Searched refs:PCIE_CFG_CLOCK_CTRL_STATUS_BP_RESET_BIT (Results 1 – 5 of 5) sorted by relevance
| /OK3568_Linux_fs/external/rkwifibt/drivers/infineon/ |
| H A D | dhd_pcie.c | 5336 #define PCIE_CFG_CLOCK_CTRL_STATUS_BP_RESET_BIT 21 macro
5395 PCIE_CFG_CLOCK_CTRL_STATUS_BP_RESET_BIT, dar_clk_ctrl_status_reg)); in dhd_bus_perform_bp_reset()
5401 cond = val & (1 << PCIE_CFG_CLOCK_CTRL_STATUS_BP_RESET_BIT); in dhd_bus_perform_bp_reset()
5407 dar_clk_ctrl_status_reg, PCIE_CFG_CLOCK_CTRL_STATUS_BP_RESET_BIT)); in dhd_bus_perform_bp_reset()
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/cywdhd/bcmdhd/ |
| H A D | dhd_pcie.c | 5328 #define PCIE_CFG_CLOCK_CTRL_STATUS_BP_RESET_BIT 21 macro
5387 PCIE_CFG_CLOCK_CTRL_STATUS_BP_RESET_BIT, dar_clk_ctrl_status_reg)); in dhd_bus_perform_bp_reset()
5393 cond = val & (1 << PCIE_CFG_CLOCK_CTRL_STATUS_BP_RESET_BIT); in dhd_bus_perform_bp_reset()
5399 dar_clk_ctrl_status_reg, PCIE_CFG_CLOCK_CTRL_STATUS_BP_RESET_BIT)); in dhd_bus_perform_bp_reset()
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/ |
| H A D | dhd_pcie.c | 5328 #define PCIE_CFG_CLOCK_CTRL_STATUS_BP_RESET_BIT 21 macro
5387 PCIE_CFG_CLOCK_CTRL_STATUS_BP_RESET_BIT, dar_clk_ctrl_status_reg)); in dhd_bus_perform_bp_reset()
5393 cond = val & (1 << PCIE_CFG_CLOCK_CTRL_STATUS_BP_RESET_BIT); in dhd_bus_perform_bp_reset()
5399 dar_clk_ctrl_status_reg, PCIE_CFG_CLOCK_CTRL_STATUS_BP_RESET_BIT)); in dhd_bus_perform_bp_reset()
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| /OK3568_Linux_fs/external/rkwifibt/drivers/bcmdhd/ |
| H A D | dhd_pcie.c | 7399 #define PCIE_CFG_CLOCK_CTRL_STATUS_BP_RESET_BIT 21 macro
7459 PCIE_CFG_CLOCK_CTRL_STATUS_BP_RESET_BIT, dar_clk_ctrl_status_reg)); in dhd_bus_cfg_sprom_ctrl_bp_reset()
7465 cond = val & (1 << PCIE_CFG_CLOCK_CTRL_STATUS_BP_RESET_BIT); in dhd_bus_cfg_sprom_ctrl_bp_reset()
7471 dar_clk_ctrl_status_reg, PCIE_CFG_CLOCK_CTRL_STATUS_BP_RESET_BIT)); in dhd_bus_cfg_sprom_ctrl_bp_reset()
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/ |
| H A D | dhd_pcie.c | 7392 #define PCIE_CFG_CLOCK_CTRL_STATUS_BP_RESET_BIT 21 macro
7452 PCIE_CFG_CLOCK_CTRL_STATUS_BP_RESET_BIT, dar_clk_ctrl_status_reg)); in dhd_bus_cfg_sprom_ctrl_bp_reset()
7458 cond = val & (1 << PCIE_CFG_CLOCK_CTRL_STATUS_BP_RESET_BIT); in dhd_bus_cfg_sprom_ctrl_bp_reset()
7464 dar_clk_ctrl_status_reg, PCIE_CFG_CLOCK_CTRL_STATUS_BP_RESET_BIT)); in dhd_bus_cfg_sprom_ctrl_bp_reset()
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