Searched refs:PCIE30_PHY_GRF (Results 1 – 1 of 1) sorted by relevance
513 #define PCIE30_PHY_GRF 0xFDCB8000 macro528 writel(0x80008000, PCIE30_PHY_GRF + GRF_PCIE30PHY_RK3568_CON9); in pcie_cru_init()531 PCIE30_PHY_GRF + GRF_PCIE30PHY_RK3568_CON9); //map to access sram in pcie_cru_init()535 writel(0x0 | (0x1 << 31), PCIE30_PHY_GRF + GRF_PCIE30PHY_RK3568_CON3); in pcie_cru_init()538 writel((0x0) | (0x1 << 25), PCIE30_PHY_GRF + GRF_PCIE30PHY_RK3568_CON5); in pcie_cru_init()540 writel((0x0) | (0x1 << 25), PCIE30_PHY_GRF + GRF_PCIE30PHY_RK3568_CON6); in pcie_cru_init()544 PCIE30_PHY_GRF + GRF_PCIE30PHY_RK3568_CON4); //sdram_ld_done in pcie_cru_init()546 PCIE30_PHY_GRF + GRF_PCIE30PHY_RK3568_CON4); //sdram_bypass in pcie_cru_init()553 reg = readl(PCIE30_PHY_GRF + GRF_PCIE30PHY_RK3568_STATUS0); in pcie_cru_init()560 PCIE30_PHY_GRF + GRF_PCIE30PHY_RK3568_CON9); //map to access sram in pcie_cru_init()[all …]