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Searched refs:NUM_BYTE_LANES (Results 1 – 5 of 5) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/x86/include/asm/arch-quark/
H A Dmrc.h19 #define NUM_BYTE_LANES 4 /* number of byte lanes per channel */ macro
76 uint32_t rcvn[NUM_CHANNELS][NUM_RANKS][NUM_BYTE_LANES];
77 uint32_t rdqs[NUM_CHANNELS][NUM_RANKS][NUM_BYTE_LANES];
78 uint32_t wdqs[NUM_CHANNELS][NUM_RANKS][NUM_BYTE_LANES];
79 uint32_t wdq[NUM_CHANNELS][NUM_RANKS][NUM_BYTE_LANES];
80 uint32_t vref[NUM_CHANNELS][NUM_BYTE_LANES];
/OK3568_Linux_fs/u-boot/arch/x86/cpu/quark/
H A Dsmc.c313 bl_grp < (NUM_BYTE_LANES / bl_divisor) / 2; in ddrphy_init()
944 bl_grp < (NUM_BYTE_LANES / bl_divisor) / 2; in ddrphy_init()
980 bl_grp < (NUM_BYTE_LANES / bl_divisor) / 2; in ddrphy_init()
1016 bl_grp < (NUM_BYTE_LANES / bl_divisor) / 2; in ddrphy_init()
1068 bl_grp < (NUM_BYTE_LANES / bl_divisor) / 2; in ddrphy_init()
1364 for (bl = 0; bl < NUM_BYTE_LANES; bl++) { in restore_timings()
1392 for (bl = 0; bl < NUM_BYTE_LANES; bl++) { in default_timings()
1417 uint32_t final_delay[NUM_CHANNELS][NUM_BYTE_LANES]; in rcvn_cal()
1428 uint32_t delay[NUM_BYTE_LANES]; in rcvn_cal()
1464 for (bl = 0; bl < (NUM_BYTE_LANES / bl_divisor); bl++) in rcvn_cal()
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H A Dmrc_util.c1044 for (bl_grp = 0; bl_grp < (NUM_BYTE_LANES / bl_divisor) / 2; bl_grp++) { in sample_dqs()
1094 bool direction[NUM_BYTE_LANES]; /* direction indicator */ in find_rising_edge()
1112 for (bl = 0; bl < (NUM_BYTE_LANES / bl_divisor); bl++) { in find_rising_edge()
1137 for (bl = 0; bl < NUM_BYTE_LANES / bl_divisor; bl++) { in find_rising_edge()
1202 for (bl = 0; bl < NUM_BYTE_LANES / bl_divisor; bl++) { in find_rising_edge()
1265 for (j = 0; j < MAX_BYTE_LANES; j += NUM_BYTE_LANES) in byte_lane_mask()
1266 ret_val |= (1 << ((j / NUM_BYTE_LANES) * NUM_BYTE_LANES)); in byte_lane_mask()
1360 for (bl = 0; bl < NUM_BYTE_LANES; bl++) { in clear_pointers()
1412 for (bl = 0; bl < NUM_BYTE_LANES / bl_divisor; bl++) { in print_timings_internal()
H A Dsmc.h162 #define DDRIODQ_CH_OFFSET ((NUM_BYTE_LANES / 2) * DDRIODQ_BL_OFFSET)
/OK3568_Linux_fs/u-boot/arch/arm/mach-exynos/
H A Ddmc_init_ddr3.c21 #define NUM_BYTE_LANES 4 macro
353 int start, int end, int results[NUM_BYTE_LANES]) in test_shifts() argument
358 for (byte_lane = 0; byte_lane < NUM_BYTE_LANES; byte_lane++) { in test_shifts()
410 int left[NUM_BYTE_LANES]; in software_find_read_offset()
411 int right[NUM_BYTE_LANES]; in software_find_read_offset()
430 for (byte_lane = 0; byte_lane < NUM_BYTE_LANES; byte_lane++) { in software_find_read_offset()