Searched refs:MVPP2_CPU_D_CACHE_LINE_SIZE (Results 1 – 1 of 1) sorted by relevance
68 #define NET_SKB_PAD max(32, MVPP2_CPU_D_CACHE_LINE_SIZE)590 #define MVPP2_CPU_D_CACHE_LINE_SIZE 32 macro658 ETH_HLEN + ETH_FCS_LEN, MVPP2_CPU_D_CACHE_LINE_SIZE)4074 PTR_ALIGN(aggr_txq->descs, MVPP2_CPU_D_CACHE_LINE_SIZE)); in mvpp2_aggr_txq_init()4113 PTR_ALIGN(rxq->descs, MVPP2_CPU_D_CACHE_LINE_SIZE)); in mvpp2_rxq_init()4198 PTR_ALIGN(txq->descs, MVPP2_CPU_D_CACHE_LINE_SIZE)); in mvpp2_txq_init()