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Searched refs:MLX5_ST_SZ_DW (Results 1 – 25 of 66) sorted by relevance

123

/OK3568_Linux_fs/kernel/drivers/net/ethernet/mellanox/mlx5/core/
H A Dport.c77 u32 in[MLX5_ST_SZ_DW(pcam_reg)] = {0}; in mlx5_query_pcam_reg()
89 u32 in[MLX5_ST_SZ_DW(mcam_reg)] = {0}; in mlx5_query_mcam_reg()
101 u32 in[MLX5_ST_SZ_DW(qcam_reg)] = {}; in mlx5_query_qcam_reg()
137 u32 in[MLX5_ST_SZ_DW(ptys_reg)] = {0}; in mlx5_query_port_ptys()
148 u32 in[MLX5_ST_SZ_DW(mlcr_reg)] = {0}; in mlx5_set_port_beacon()
149 u32 out[MLX5_ST_SZ_DW(mlcr_reg)]; in mlx5_set_port_beacon()
160 u32 out[MLX5_ST_SZ_DW(ptys_reg)]; in mlx5_query_ib_port_oper()
190 u32 in[MLX5_ST_SZ_DW(paos_reg)] = {0}; in mlx5_set_port_admin_status()
191 u32 out[MLX5_ST_SZ_DW(paos_reg)]; in mlx5_set_port_admin_status()
204 u32 in[MLX5_ST_SZ_DW(paos_reg)] = {0}; in mlx5_query_port_admin_status()
[all …]
H A Dtransobj.c39 u32 out[MLX5_ST_SZ_DW(alloc_transport_domain_out)] = {}; in mlx5_core_alloc_transport_domain()
40 u32 in[MLX5_ST_SZ_DW(alloc_transport_domain_in)] = {}; in mlx5_core_alloc_transport_domain()
57 u32 in[MLX5_ST_SZ_DW(dealloc_transport_domain_in)] = {}; in mlx5_core_dealloc_transport_domain()
68 u32 out[MLX5_ST_SZ_DW(create_rq_out)] = {}; in mlx5_core_create_rq()
91 u32 in[MLX5_ST_SZ_DW(destroy_rq_in)] = {}; in mlx5_core_destroy_rq()
101 u32 in[MLX5_ST_SZ_DW(query_rq_in)] = {}; in mlx5_core_query_rq()
112 u32 out[MLX5_ST_SZ_DW(create_sq_out)] = {}; in mlx5_core_create_sq()
133 u32 in[MLX5_ST_SZ_DW(destroy_sq_in)] = {}; in mlx5_core_destroy_sq()
142 u32 in[MLX5_ST_SZ_DW(query_sq_in)] = {}; in mlx5_core_query_sq()
177 u32 out[MLX5_ST_SZ_DW(create_tir_out)] = {}; in mlx5_core_create_tir()
[all …]
H A Dfw.c75 u32 in[MLX5_ST_SZ_DW(query_adapter_in)] = {}; in mlx5_query_board_id()
102 u32 in[MLX5_ST_SZ_DW(query_adapter_in)] = {}; in mlx5_core_query_vendor_id()
264 u32 in[MLX5_ST_SZ_DW(init_hca_in)] = {}; in mlx5_cmd_init_hca()
280 u32 in[MLX5_ST_SZ_DW(teardown_hca_in)] = {}; in mlx5_cmd_teardown_hca()
288 u32 out[MLX5_ST_SZ_DW(teardown_hca_out)] = {0}; in mlx5_cmd_force_teardown_hca()
289 u32 in[MLX5_ST_SZ_DW(teardown_hca_in)] = {0}; in mlx5_cmd_force_teardown_hca()
318 u32 out[MLX5_ST_SZ_DW(teardown_hca_out)] = {}; in mlx5_cmd_fast_teardown_hca()
319 u32 in[MLX5_ST_SZ_DW(teardown_hca_in)] = {}; in mlx5_cmd_fast_teardown_hca()
376 u32 out[MLX5_ST_SZ_DW(mcc_reg)]; in mlx5_reg_mcc_set()
377 u32 in[MLX5_ST_SZ_DW(mcc_reg)]; in mlx5_reg_mcc_set()
[all …]
H A Dmr.c42 u32 lout[MLX5_ST_SZ_DW(create_mkey_out)] = {}; in mlx5_core_create_mkey()
68 u32 in[MLX5_ST_SZ_DW(destroy_mkey_in)] = {}; in mlx5_core_destroy_mkey()
79 u32 in[MLX5_ST_SZ_DW(query_mkey_in)] = {}; in mlx5_core_query_mkey()
101 u32 out[MLX5_ST_SZ_DW(create_psv_out)] = {}; in mlx5_core_create_psv()
102 u32 in[MLX5_ST_SZ_DW(create_psv_in)] = {}; in mlx5_core_create_psv()
125 u32 in[MLX5_ST_SZ_DW(destroy_psv_in)] = {}; in mlx5_core_destroy_psv()
H A Dfs_cmd.c158 u32 in[MLX5_ST_SZ_DW(set_flow_table_root_in)] = {}; in mlx5_cmd_update_root_ft()
191 u32 out[MLX5_ST_SZ_DW(create_flow_table_out)] = {}; in mlx5_cmd_create_flow_table()
192 u32 in[MLX5_ST_SZ_DW(create_flow_table_in)] = {}; in mlx5_cmd_create_flow_table()
248 u32 in[MLX5_ST_SZ_DW(destroy_flow_table_in)] = {}; in mlx5_cmd_destroy_flow_table()
267 u32 in[MLX5_ST_SZ_DW(modify_flow_table_in)] = {}; in mlx5_cmd_modify_flow_table()
315 u32 out[MLX5_ST_SZ_DW(create_flow_group_out)] = {}; in mlx5_cmd_create_flow_group()
339 u32 in[MLX5_ST_SZ_DW(destroy_flow_group_in)] = {}; in mlx5_cmd_destroy_flow_group()
397 u32 out[MLX5_ST_SZ_DW(set_fte_out)] = {0}; in mlx5_cmd_set_fte()
597 u32 in[MLX5_ST_SZ_DW(delete_fte_in)] = {}; in mlx5_cmd_delete_fte()
616 u32 out[MLX5_ST_SZ_DW(alloc_flow_counter_out)] = {}; in mlx5_cmd_fc_bulk_alloc()
[all …]
H A Dpd.c40 u32 out[MLX5_ST_SZ_DW(alloc_pd_out)] = {}; in mlx5_core_alloc_pd()
41 u32 in[MLX5_ST_SZ_DW(alloc_pd_in)] = {}; in mlx5_core_alloc_pd()
54 u32 in[MLX5_ST_SZ_DW(dealloc_pd_in)] = {}; in mlx5_core_dealloc_pd()
H A Dcq.c93 u32 din[MLX5_ST_SZ_DW(destroy_cq_in)] = {}; in mlx5_core_create_cq()
154 u32 in[MLX5_ST_SZ_DW(destroy_cq_in)] = {}; in mlx5_core_destroy_cq()
180 u32 in[MLX5_ST_SZ_DW(query_cq_in)] = {}; in mlx5_core_query_cq()
191 u32 out[MLX5_ST_SZ_DW(modify_cq_out)] = {}; in mlx5_core_modify_cq()
204 u32 in[MLX5_ST_SZ_DW(modify_cq_in)] = {}; in mlx5_core_modify_cq_moderation()
H A Dvport.c45 u32 out[MLX5_ST_SZ_DW(query_vport_state_out)] = {}; in mlx5_query_vport_state()
46 u32 in[MLX5_ST_SZ_DW(query_vport_state_in)] = {}; in mlx5_query_vport_state()
66 u32 in[MLX5_ST_SZ_DW(modify_vport_state_in)] = {}; in mlx5_modify_vport_admin_state()
81 u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)] = {}; in mlx5_query_nic_vport_context()
95 u32 out[MLX5_ST_SZ_DW(query_nic_vport_context_out)] = {}; in mlx5_query_nic_vport_min_inline()
127 u32 in[MLX5_ST_SZ_DW(modify_nic_vport_context_in)] = {}; in mlx5_modify_nic_vport_min_inline()
148 u32 out[MLX5_ST_SZ_DW(query_nic_vport_context_out)] = {}; in mlx5_query_nic_vport_mac_address()
149 u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)] = {}; in mlx5_query_nic_vport_mac_address()
258 u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)] = {0}; in mlx5_query_nic_vport_mac_list()
319 u32 out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)] = {}; in mlx5_modify_nic_vport_mac_list()
[all …]
/OK3568_Linux_fs/kernel/drivers/infiniband/hw/mlx5/
H A Dcmd.c10 u32 out[MLX5_ST_SZ_DW(query_special_contexts_out)] = {}; in mlx5_cmd_dump_fill_mkey()
11 u32 in[MLX5_ST_SZ_DW(query_special_contexts_in)] = {}; in mlx5_cmd_dump_fill_mkey()
25 u32 out[MLX5_ST_SZ_DW(query_special_contexts_out)] = {}; in mlx5_cmd_null_mkey()
26 u32 in[MLX5_ST_SZ_DW(query_special_contexts_in)] = {}; in mlx5_cmd_null_mkey()
41 u32 in[MLX5_ST_SZ_DW(query_cong_params_in)] = {}; in mlx5_cmd_query_cong_params()
59 u32 out[MLX5_ST_SZ_DW(alloc_memic_out)] = {}; in mlx5_cmd_alloc_memic()
60 u32 in[MLX5_ST_SZ_DW(alloc_memic_in)] = {}; in mlx5_cmd_alloc_memic()
130 u32 in[MLX5_ST_SZ_DW(dealloc_memic_in)] = {}; in mlx5_cmd_dealloc_memic()
153 u32 in[MLX5_ST_SZ_DW(destroy_tir_in)] = {}; in mlx5_cmd_destroy_tir()
163 u32 in[MLX5_ST_SZ_DW(destroy_tis_in)] = {}; in mlx5_cmd_destroy_tis()
[all …]
H A Dqpc.c192 u32 in[MLX5_ST_SZ_DW(destroy_dct_in)] = {}; in _mlx5_core_destroy_dct()
242 u32 din[MLX5_ST_SZ_DW(destroy_qp_in)] = {}; in mlx5_qpc_create_qp()
274 u32 in[MLX5_ST_SZ_DW(drain_dct_in)] = {}; in mlx5_core_drain_dct()
291 u32 in[MLX5_ST_SZ_DW(destroy_qp_in)] = {}; in mlx5_core_destroy_qp()
307 u32 in[MLX5_ST_SZ_DW(set_delay_drop_params_in)] = {}; in mlx5_core_set_delay_drop()
503 u32 in[MLX5_ST_SZ_DW(query_qp_in)] = {}; in mlx5_core_qp_query()
513 u32 in[MLX5_ST_SZ_DW(query_dct_in)] = {}; in mlx5_core_dct_query()
525 u32 out[MLX5_ST_SZ_DW(alloc_xrcd_out)] = {}; in mlx5_core_xrcd_alloc()
526 u32 in[MLX5_ST_SZ_DW(alloc_xrcd_in)] = {}; in mlx5_core_xrcd_alloc()
538 u32 in[MLX5_ST_SZ_DW(dealloc_xrcd_in)] = {}; in mlx5_core_xrcd_dealloc()
[all …]
H A Dsrq_cmd.c98 u32 create_out[MLX5_ST_SZ_DW(create_srq_out)] = {0}; in create_srq_cmd()
135 u32 in[MLX5_ST_SZ_DW(destroy_srq_in)] = {}; in destroy_srq_cmd()
147 u32 in[MLX5_ST_SZ_DW(arm_rq_in)] = {}; in arm_srq_cmd()
161 u32 in[MLX5_ST_SZ_DW(query_srq_in)] = {}; in query_srq_cmd()
189 u32 create_out[MLX5_ST_SZ_DW(create_xrc_srq_out)]; in create_xrc_srq_cmd()
230 u32 in[MLX5_ST_SZ_DW(destroy_xrc_srq_in)] = {}; in destroy_xrc_srq_cmd()
242 u32 in[MLX5_ST_SZ_DW(arm_xrc_srq_in)] = {}; in arm_xrc_srq_cmd()
258 u32 in[MLX5_ST_SZ_DW(query_xrc_srq_in)] = {}; in query_xrc_srq_cmd()
330 u32 in[MLX5_ST_SZ_DW(destroy_rmp_in)] = {}; in destroy_rmp_cmd()
420 u32 create_out[MLX5_ST_SZ_DW(create_xrq_out)] = {0}; in create_xrq_cmd()
[all …]
H A Dcounters.c195 u32 out[MLX5_ST_SZ_DW(query_q_counter_out)] = {}; in mlx5_ib_query_q_counters()
196 u32 in[MLX5_ST_SZ_DW(query_q_counter_in)] = {}; in mlx5_ib_query_q_counters()
219 u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {}; in mlx5_ib_query_ext_ppcnt_counters()
325 u32 in[MLX5_ST_SZ_DW(dealloc_q_counter_in)] = {}; in mlx5_ib_counter_dealloc()
343 u32 out[MLX5_ST_SZ_DW(alloc_q_counter_out)] = {}; in mlx5_ib_counter_bind_qp()
344 u32 in[MLX5_ST_SZ_DW(alloc_q_counter_in)] = {}; in mlx5_ib_counter_bind_qp()
479 u32 in[MLX5_ST_SZ_DW(dealloc_q_counter_in)] = {}; in mlx5_ib_dealloc_counters()
501 u32 out[MLX5_ST_SZ_DW(alloc_q_counter_out)] = {}; in mlx5_ib_alloc_counters()
502 u32 in[MLX5_ST_SZ_DW(alloc_q_counter_in)] = {}; in mlx5_ib_alloc_counters()
/OK3568_Linux_fs/kernel/drivers/net/ethernet/mellanox/mlx5/core/fpga/
H A Dcmd.c40 #define MLX5_FPGA_ACCESS_REG_SZ (MLX5_ST_SZ_DW(fpga_access_reg) + \
75 u32 in[MLX5_ST_SZ_DW(fpga_cap)] = {0}; in mlx5_fpga_caps()
84 u32 in[MLX5_ST_SZ_DW(fpga_ctrl)] = {0}; in mlx5_fpga_ctrl_op()
85 u32 out[MLX5_ST_SZ_DW(fpga_ctrl)]; in mlx5_fpga_ctrl_op()
127 u32 in[MLX5_ST_SZ_DW(fpga_ctrl)] = {0}; in mlx5_fpga_query()
128 u32 out[MLX5_ST_SZ_DW(fpga_ctrl)]; in mlx5_fpga_query()
145 u32 out[MLX5_ST_SZ_DW(fpga_create_qp_out)] = {}; in mlx5_fpga_create_qp()
146 u32 in[MLX5_ST_SZ_DW(fpga_create_qp_in)] = {}; in mlx5_fpga_create_qp()
167 u32 in[MLX5_ST_SZ_DW(fpga_modify_qp_in)] = {}; in mlx5_fpga_modify_qp()
181 u32 out[MLX5_ST_SZ_DW(fpga_query_qp_out)] = {}; in mlx5_fpga_query_qp()
[all …]
/OK3568_Linux_fs/kernel/drivers/vdpa/mlx5/core/
H A Dresources.c11 u32 out[MLX5_ST_SZ_DW(alloc_pd_out)] = {}; in alloc_pd()
12 u32 in[MLX5_ST_SZ_DW(alloc_pd_in)] = {}; in alloc_pd()
27 u32 in[MLX5_ST_SZ_DW(dealloc_pd_in)] = {}; in dealloc_pd()
38 u32 out[MLX5_ST_SZ_DW(query_special_contexts_out)] = {}; in get_null_mkey()
39 u32 in[MLX5_ST_SZ_DW(query_special_contexts_in)] = {}; in get_null_mkey()
52 u32 out[MLX5_ST_SZ_DW(create_uctx_out)] = {}; in create_uctx()
79 u32 out[MLX5_ST_SZ_DW(destroy_uctx_out)] = {}; in destroy_uctx()
80 u32 in[MLX5_ST_SZ_DW(destroy_uctx_in)] = {}; in destroy_uctx()
90 u32 out[MLX5_ST_SZ_DW(create_tis_out)] = {}; in mlx5_vdpa_create_tis()
104 u32 in[MLX5_ST_SZ_DW(destroy_tis_in)] = {}; in mlx5_vdpa_destroy_tis()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/mellanox/mlx5/core/steering/
H A Ddr_cmd.c12 u32 out[MLX5_ST_SZ_DW(query_esw_vport_context_out)] = {}; in mlx5dr_cmd_query_esw_vport_context()
13 u32 in[MLX5_ST_SZ_DW(query_esw_vport_context_in)] = {}; in mlx5dr_cmd_query_esw_vport_context()
37 u32 in[MLX5_ST_SZ_DW(query_hca_cap_in)] = {}; in mlx5dr_cmd_query_gvmi()
140 u32 out[MLX5_ST_SZ_DW(query_flow_table_out)] = {}; in mlx5dr_cmd_query_flow_table()
141 u32 in[MLX5_ST_SZ_DW(query_flow_table_in)] = {}; in mlx5dr_cmd_query_flow_table()
167 u32 in[MLX5_ST_SZ_DW(sync_steering_in)] = {}; in mlx5dr_cmd_sync_steering()
181 u32 out[MLX5_ST_SZ_DW(set_fte_out)] = {}; in mlx5dr_cmd_set_fte_modify_and_vport()
222 u32 in[MLX5_ST_SZ_DW(delete_fte_in)] = {}; in mlx5dr_cmd_del_flow_table_entry()
237 u32 out[MLX5_ST_SZ_DW(alloc_modify_header_context_out)] = {}; in mlx5dr_cmd_alloc_modify_header()
270 u32 in[MLX5_ST_SZ_DW(dealloc_modify_header_context_in)] = {}; in mlx5dr_cmd_dealloc_modify_header()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/mellanox/mlx5/core/diag/
H A Dfs_tracepoint.h109 __array(u32, mask_outer, MLX5_ST_SZ_DW(fte_match_set_lyr_2_4))
110 __array(u32, mask_inner, MLX5_ST_SZ_DW(fte_match_set_lyr_2_4))
111 __array(u32, mask_misc, MLX5_ST_SZ_DW(fte_match_set_misc))
193 __array(u32, mask_outer, MLX5_ST_SZ_DW(fte_match_set_lyr_2_4))
194 __array(u32, mask_inner, MLX5_ST_SZ_DW(fte_match_set_lyr_2_4))
195 __array(u32, mask_misc, MLX5_ST_SZ_DW(fte_match_set_misc))
196 __array(u32, value_outer, MLX5_ST_SZ_DW(fte_match_set_lyr_2_4))
197 __array(u32, value_inner, MLX5_ST_SZ_DW(fte_match_set_lyr_2_4))
198 __array(u32, value_misc, MLX5_ST_SZ_DW(fte_match_set_misc))
H A Dfw_tracer.c42 u32 out[MLX5_ST_SZ_DW(mtrc_cap)] = {0}; in mlx5_query_mtrc_caps()
43 u32 in[MLX5_ST_SZ_DW(mtrc_cap)] = {0}; in mlx5_query_mtrc_caps()
85 u32 in[MLX5_ST_SZ_DW(mtrc_cap)] = {0}; in mlx5_set_mtrc_caps_trace_owner()
96 u32 out[MLX5_ST_SZ_DW(mtrc_cap)] = {0}; in mlx5_fw_tracer_ownership_acquire()
117 u32 out[MLX5_ST_SZ_DW(mtrc_cap)] = {0}; in mlx5_fw_tracer_ownership_release()
267 u32 in[MLX5_ST_SZ_DW(mtrc_cap)] = {0}; in mlx5_tracer_read_strings_db()
340 u32 out[MLX5_ST_SZ_DW(mtrc_ctrl)] = {0}; in mlx5_fw_tracer_arm()
341 u32 in[MLX5_ST_SZ_DW(mtrc_ctrl)] = {0}; in mlx5_fw_tracer_arm()
745 u32 out[MLX5_ST_SZ_DW(mtrc_conf)] = {0}; in mlx5_fw_tracer_set_mtrc_conf()
746 u32 in[MLX5_ST_SZ_DW(mtrc_conf)] = {0}; in mlx5_fw_tracer_set_mtrc_conf()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/mellanox/mlx5/core/lib/
H A Dcrypto.c11 u32 in[MLX5_ST_SZ_DW(create_encryption_key_in)] = {}; in mlx5_create_encryption_key()
12 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)]; in mlx5_create_encryption_key()
63 u32 in[MLX5_ST_SZ_DW(general_obj_in_cmd_hdr)] = {}; in mlx5_destroy_encryption_key()
64 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)]; in mlx5_destroy_encryption_key()
H A Dgeneve.c22 u32 in[MLX5_ST_SZ_DW(create_geneve_tlv_option_in)] = {}; in mlx5_geneve_tlv_option_create()
23 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)] = {}; in mlx5_geneve_tlv_option_create()
53 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)] = {}; in mlx5_geneve_tlv_option_destroy()
54 u32 in[MLX5_ST_SZ_DW(general_obj_in_cmd_hdr)] = {}; in mlx5_geneve_tlv_option_destroy()
H A Ddm.c97 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)] = {}; in mlx5_dm_sw_icm_alloc()
98 u32 in[MLX5_ST_SZ_DW(create_sw_icm_in)] = {}; in mlx5_dm_sw_icm_alloc()
186 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)] = {}; in mlx5_dm_sw_icm_dealloc()
187 u32 in[MLX5_ST_SZ_DW(general_obj_in_cmd_hdr)] = {}; in mlx5_dm_sw_icm_dealloc()
/OK3568_Linux_fs/kernel/drivers/net/ethernet/mellanox/mlx5/core/en/
H A Dport.c113 u32 out[MLX5_ST_SZ_DW(ptys_reg)]; in mlx5_port_query_eth_proto()
133 u32 out[MLX5_ST_SZ_DW(ptys_reg)]; in mlx5_port_query_eth_autoneg()
150 u32 out[MLX5_ST_SZ_DW(ptys_reg)]; in mlx5_port_set_eth_ptys()
151 u32 in[MLX5_ST_SZ_DW(ptys_reg)]; in mlx5_port_set_eth_ptys()
472 u32 out[MLX5_ST_SZ_DW(pplm_reg)] = {}; in mlx5e_fec_in_caps()
473 u32 in[MLX5_ST_SZ_DW(pplm_reg)] = {}; in mlx5e_fec_in_caps()
503 u32 out[MLX5_ST_SZ_DW(pplm_reg)] = {}; in mlx5e_get_fec_mode()
504 u32 in[MLX5_ST_SZ_DW(pplm_reg)] = {}; in mlx5e_get_fec_mode()
541 u32 out[MLX5_ST_SZ_DW(pplm_reg)] = {}; in mlx5e_set_fec_mode()
542 u32 in[MLX5_ST_SZ_DW(pplm_reg)] = {}; in mlx5e_set_fec_mode()
H A Dparams.h15 u32 cqc[MLX5_ST_SZ_DW(cqc)];
23 u32 rqc[MLX5_ST_SZ_DW(rqc)];
30 u32 sqc[MLX5_ST_SZ_DW(sqc)];
H A Dmonitor_stats.c41 u32 in[MLX5_ST_SZ_DW(arm_monitor_counter_in)] = {}; in mlx5e_monitor_counter_arm()
107 u32 in[MLX5_ST_SZ_DW(set_monitor_counter_in)] = {}; in mlx5e_set_monitor_counter()
143 u32 in[MLX5_ST_SZ_DW(set_monitor_counter_in)] = {}; in mlx5e_monitor_counter_cleanup()
/OK3568_Linux_fs/kernel/drivers/net/ethernet/mellanox/mlx5/core/accel/
H A Dipsec_offload.c140 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)]; in mlx5_create_ipsec_obj()
141 u32 in[MLX5_ST_SZ_DW(create_ipsec_obj_in)] = {}; in mlx5_create_ipsec_obj()
194 u32 in[MLX5_ST_SZ_DW(general_obj_in_cmd_hdr)] = {}; in mlx5_destroy_ipsec_obj()
195 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)]; in mlx5_destroy_ipsec_obj()
286 u32 in[MLX5_ST_SZ_DW(modify_ipsec_obj_in)] = {}; in mlx5_modify_ipsec_obj()
287 u32 out[MLX5_ST_SZ_DW(query_ipsec_obj_out)]; in mlx5_modify_ipsec_obj()
/OK3568_Linux_fs/kernel/drivers/net/ethernet/mellanox/mlx5/core/ipoib/
H A Dipoib.c166 u32 in[MLX5_ST_SZ_DW(rst2init_qp_in)] = {}; in mlx5i_init_underlay_qp()
184 u32 in[MLX5_ST_SZ_DW(init2rtr_qp_in)] = {}; in mlx5i_init_underlay_qp()
193 u32 in[MLX5_ST_SZ_DW(rtr2rts_qp_in)] = {}; in mlx5i_init_underlay_qp()
205 u32 in[MLX5_ST_SZ_DW(qp_2err_in)] = {}; in mlx5i_init_underlay_qp()
218 u32 in[MLX5_ST_SZ_DW(qp_2rst_in)] = {}; in mlx5i_uninit_underlay_qp()
230 u32 out[MLX5_ST_SZ_DW(create_qp_out)] = {}; in mlx5i_create_underlay_qp()
231 u32 in[MLX5_ST_SZ_DW(create_qp_in)] = {}; in mlx5i_create_underlay_qp()
265 u32 in[MLX5_ST_SZ_DW(destroy_qp_in)] = {}; in mlx5i_destroy_underlay_qp()
279 u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {}; in mlx5i_create_tis()

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