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Searched refs:LVTMA_PWRSEQ_CNTL__LVTMA_DIGON__SHIFT (Results 1 – 10 of 10) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h7618 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON__SHIFT 0x00000010 macro
H A Ddce_8_0_sh_mask.h3190 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON__SHIFT 0x10 macro
H A Ddce_10_0_sh_mask.h3112 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON__SHIFT 0x10 macro
H A Ddce_11_0_sh_mask.h3182 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON__SHIFT 0x10 macro
H A Ddce_11_2_sh_mask.h3430 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON__SHIFT 0x10 macro
H A Ddce_12_0_sh_mask.h9251 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON__SHIFT … macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h40000 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h43234 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h48743 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h49111 #define LVTMA_PWRSEQ_CNTL__LVTMA_DIGON__SHIFT … macro