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Searched refs:IS_FPGA_MAXIMUS_DC (Results 1 – 25 of 28) sorted by relevance

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/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/
H A Ddce112_clk_mgr.c112 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dce112_set_clock()
154 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dce112_set_dispclk()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/gpio/
H A Dhw_translate.c69 if (IS_FPGA_MAXIMUS_DC(dce_environment)) { in dal_hw_translate_init()
H A Dhw_factory.c71 if (IS_FPGA_MAXIMUS_DC(dce_environment)) { in dal_hw_factory_init()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dce112/
H A Ddce112_hw_sequencer.c123 if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) in dce112_enable_display_power_gating()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
H A Drv1_clk_mgr_vbios_smu.c135 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in rv1_vbios_smu_set_dispclk()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_link_hwss.c421 if (dc_is_virtual_signal(stream->signal) || IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) in dp_set_dsc_on_rx()
471 if (dc_is_dp_signal(stream->signal) && !IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dp_set_dsc_on_stream()
498 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dp_set_dsc_on_stream()
H A Ddc_link.c3189 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in core_link_enable_stream()
3659 !IS_FPGA_MAXIMUS_DC(link->ctx->dce_environment)); in dc_link_is_fec_supported()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
H A Drn_clk_mgr_vbios_smu.c131 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in rn_vbios_smu_set_dispclk()
H A Drn_clk_mgr.c871 if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) { in rn_clk_mgr_construct()
925 if (!IS_FPGA_MAXIMUS_DC(ctx->dce_environment) && clk_mgr->smu_ver >= 0x00371500) { in rn_clk_mgr_construct()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_init.c141 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn20_hw_sequencer_construct()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_init.c141 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn30_hw_sequencer_construct()
H A Ddcn30_hwseq.c448 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn30_init_hw()
479 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn30_init_hw()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dcn21/
H A Ddcn21_init.c147 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn21_hw_sequencer_construct()
H A Ddcn21_resource.c1499 if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment) || IS_DIAG_DC(ctx->dce_environment)) { in dcn21_pp_smu_create()
1809 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) in dcn21_resource_construct()
2090 (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment) ? in dcn21_resource_construct()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dce120/
H A Ddce120_hw_sequencer.c162 if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) in dce120_enable_display_power_gating()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/
H A Ddc_types.h72 #define IS_FPGA_MAXIMUS_DC(dce_environment) \ macro
76 (IS_FPGA_MAXIMUS_DC(dce_environment) || (dce_environment == DCE_ENV_DIAG))
H A Ddc_helper.c513 !IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) in generic_reg_wait()
525 if (!IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) in generic_reg_wait()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
H A Ddcn20_clk_mgr.c479 if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) { in dcn20_clk_mgr_construct()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
H A Ddcn30_clk_mgr.c523 if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) { in dcn3_clk_mgr_construct()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_hw_sequencer.c888 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn10_reset_back_end_for_pipe()
1279 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn10_init_hw()
1310 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn10_init_hw()
3072 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn10_prepare_bandwidth()
3105 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn10_optimize_bandwidth()
H A Ddcn10_resource.c1647 (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment) ? in dcn10_resource_construct()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_dmcu.c892 if (!IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) { in dcn21_dmcu_construct()
H A Ddce_clk_mgr.c329 if (!IS_FPGA_MAXIMUS_DC(core_dc->ctx->dce_environment)) { in dce112_set_clock()
H A Ddce_clock_source.c925 if (IS_FPGA_MAXIMUS_DC(clock_source->ctx->dce_environment)) { in dce112_program_pix_clk()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_hw_sequencer.c208 if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) in dce110_enable_display_power_gating()

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