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Searched refs:HDLC_ENCODING_DIFF_BIPHASE_LEVEL (Results 1 – 6 of 6) sorted by relevance

/OK3568_Linux_fs/kernel/include/uapi/linux/
H A Dsynclink.h110 #define HDLC_ENCODING_DIFF_BIPHASE_LEVEL 7 macro
/OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/aarch64-none-linux-gnu/libc/usr/include/linux/
H A Dsynclink.h110 #define HDLC_ENCODING_DIFF_BIPHASE_LEVEL 7 macro
/OK3568_Linux_fs/prebuilts/gcc/linux-x86/arm/gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf/arm-none-linux-gnueabihf/libc/usr/include/linux/
H A Dsynclink.h110 #define HDLC_ENCODING_DIFF_BIPHASE_LEVEL 7 macro
/OK3568_Linux_fs/kernel/drivers/tty/
H A Dsynclink_gt.c4229 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: val |= BIT12 + BIT11 + BIT10; break; in sync_mode()
4302 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: val |= BIT12 + BIT11 + BIT10; break; in sync_mode()
4361 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: in sync_mode()
H A Dsynclink.c4599 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: RegValue |= BIT15 | BIT14 | BIT13; break; in usc_set_sdlc_mode()
4671 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: RegValue |= BIT15 | BIT14 | BIT13; break; in usc_set_sdlc_mode()
4842 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: RegValue |= BIT9 | BIT8; break; in usc_set_sdlc_mode()
H A Dsynclinkmp.c4563 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: /* not supported */ in hdlc_mode()