Searched refs:H3_EPHY_CLK_SEL (Results 1 – 1 of 1) sorted by relevance
246 #define H3_EPHY_CLK_SEL BIT(18) /* 1: 24MHz, 0: 25MHz */ macro929 reg |= H3_EPHY_CLK_SEL; in sun8i_dwmac_set_syscon()