Searched refs:FUS_MC_VM_MD_L1_TLB0_CNTL (Results 1 – 2 of 2) sorted by relevance
969 #define FUS_MC_VM_MD_L1_TLB0_CNTL 0x265C macro
2421 WREG32(FUS_MC_VM_MD_L1_TLB0_CNTL, tmp); in evergreen_pcie_gart_enable()