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Searched refs:DISPCLK (Results 1 – 9 of 9) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddisplay_mode_vba_30.c46 double DISPCLK; member
283 double DISPCLK,
988 myPipe->DISPCLK, in CalculatePrefetchSchedule()
1038 if (myPipe->DPPCLK == 0.0 || myPipe->DISPCLK == 0.0) in CalculatePrefetchSchedule()
1041 …Cycles * myPipe->PixelClock / myPipe->DPPCLK + DISPCLKCycles * myPipe->PixelClock / myPipe->DISPCLK in CalculatePrefetchSchedule()
2069 v->DISPCLK = v->DISPCLK_calculated; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2436 v->HTotal[k]) / v->DISPCLK; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2451 v->HTotal[k]) / v->DISPCLK); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2498 myPipe.DISPCLK = v->DISPCLK; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2582 … double TotalRepeaterDelayTime = v->MaxInterDCNTileRepeaters * (2 / v->DPPCLK[k] + 3 / v->DISPCLK); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddisplay_mode_vba_20v2.c65 double DISPCLK,
94 double DISPCLK,
472 double DISPCLK, in CalculateDelayAfterScaler() argument
520 if (DPPCLK == 0.0 || DISPCLK == 0.0) in CalculateDelayAfterScaler()
523 *DSTXAfterScaler = DPPCycles * PixelClock / DPPCLK + DISPCLKCycles * PixelClock / DISPCLK in CalculateDelayAfterScaler()
544 double DISPCLK, in CalculatePrefetchSchedule() argument
610 TotalRepeaterDelayTime = MaxInterDCNTileRepeaters * (2.0 / DPPCLK + 3.0 / DISPCLK); in CalculatePrefetchSchedule()
627 Tdmbf = DynamicMetadataTransmittedBytes / 4.0 / DISPCLK; in CalculatePrefetchSchedule()
2029 / mode_lib->vba.DISPCLK; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2048 / mode_lib->vba.DISPCLK); in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
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H A Ddisplay_mode_vba_20.c59 double DISPCLK,
442 double DISPCLK, in CalculatePrefetchSchedule() argument
528 if (DPPCLK == 0.0 || DISPCLK == 0.0) in CalculatePrefetchSchedule()
531 *DSTXAfterScaler = DPPCycles * PixelClock / DPPCLK + DISPCLKCycles * PixelClock / DISPCLK in CalculatePrefetchSchedule()
547 TotalRepeaterDelayTime = MaxInterDCNTileRepeaters * (2.0 / DPPCLK + 3.0 / DISPCLK); in CalculatePrefetchSchedule()
564 Tdmbf = DynamicMetadataTransmittedBytes / 4.0 / DISPCLK; in CalculatePrefetchSchedule()
1993 / mode_lib->vba.DISPCLK; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2012 / mode_lib->vba.DISPCLK); in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2094 mode_lib->vba.DISPCLK, in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
5092 mode_lib->vba.DISPCLK = locals->RequiredDISPCLK[mode_lib->vba.VoltageLevel][MaximumMPCCombine]; in dml20_ModeSupportAndSystemConfigurationFull()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dml/dcn21/
H A Ddisplay_mode_vba_21.c43 double DISPCLK; member
737 if (myPipe->DPPCLK == 0.0 || myPipe->DISPCLK == 0.0) in CalculatePrefetchSchedule()
741 + DISPCLKCycles * myPipe->PixelClock / myPipe->DISPCLK + DSCDelay; in CalculatePrefetchSchedule()
756 TotalRepeaterDelayTime = MaxInterDCNTileRepeaters * (2.0 / myPipe->DPPCLK + 3.0 / myPipe->DISPCLK); in CalculatePrefetchSchedule()
773 Tdmbf = DynamicMetadataTransmittedBytes / 4.0 / myPipe->DISPCLK; in CalculatePrefetchSchedule()
2050 / mode_lib->vba.DISPCLK; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2069 / mode_lib->vba.DISPCLK); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2136 myPipe.DISPCLK = mode_lib->vba.DISPCLK; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
4703 myPipe.DISPCLK = locals->RequiredDISPCLK[i][j]; in dml21_ModeSupportAndSystemConfigurationFull()
5203 mode_lib->vba.DISPCLK = locals->RequiredDISPCLK[mode_lib->vba.VoltageLevel][MaximumMPCCombine]; in dml21_ModeSupportAndSystemConfigurationFull()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.c847 mode_lib->vba.DISPCLK = mode_lib->vba.cache_pipes[0].clks_cfg.dispclk_mhz; in ModeSupportAndSystemConfiguration()
849 mode_lib->vba.DISPCLK = soc->clock_limits[mode_lib->vba.VoltageLevel].dispclk_mhz; in ModeSupportAndSystemConfiguration()
H A Ddisplay_mode_vba.h284 double DISPCLK; member
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dnavi10_ppt.c158 CLK_MAP(DISPCLK, PPCLK_DISPCLK),
H A Dsienna_cichlid_ppt.c144 CLK_MAP(DISPCLK, PPCLK_DISPCLK),
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_resource.c3081 context->bw_ctx.bw.dcn.clk.dispclk_khz = context->bw_ctx.dml.vba.DISPCLK * 1000;