Searched refs:CLK_SOURCE_EMC_2X_CLK_DIVISOR_MASK (Results 1 – 1 of 1) sorted by relevance
22 #define CLK_SOURCE_EMC_2X_CLK_DIVISOR_MASK GENMASK(7, 0) macro60 div = val & CLK_SOURCE_EMC_2X_CLK_DIVISOR_MASK; in emc_recalc_rate()81 div = val & CLK_SOURCE_EMC_2X_CLK_DIVISOR_MASK; in emc_set_parent()110 val &= ~CLK_SOURCE_EMC_2X_CLK_DIVISOR_MASK; in emc_set_rate()147 val &= ~CLK_SOURCE_EMC_2X_CLK_DIVISOR_MASK; in emc_set_rate_and_parent()