Searched refs:CLK_PMU1_SPI0_DIV_SHIFT (Results 1 – 2 of 2) sorted by relevance
279 CLK_PMU1_SPI0_DIV_SHIFT = 0, enumerator280 CLK_PMU1_SPI0_DIV_MASK = 0x3 << CLK_PMU1_SPI0_DIV_SHIFT,
739 div = (con & CLK_PMU1_SPI0_DIV_MASK) >> CLK_PMU1_SPI0_DIV_SHIFT; in rk3562_spi_get_rate()791 (div - 1) << CLK_PMU1_SPI0_DIV_SHIFT); in rk3562_spi_set_rate()