Searched refs:CLK_DIV_TOP2_VAL (Results 1 – 2 of 2) sorted by relevance
629 #define CLK_DIV_TOP2_VAL NOT_AVAILABLE macro796 #define CLK_DIV_TOP2_VAL 0x11101100 macro
924 writel(CLK_DIV_TOP2_VAL, &clk->div_top2); in exynos5420_system_clock_init()