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Searched refs:CLK_DIV_CDREX_VAL (Results 1 – 2 of 2) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/mach-exynos/
H A Dexynos5_setup.h522 #define CLK_DIV_CDREX_VAL ((MCLK_DPHY_RATIO << 24) \ macro
778 #define CLK_DIV_CDREX_VAL 0x17010100 macro
H A Dclock_init_exynos5.c731 writel(CLK_DIV_CDREX_VAL, &clk->div_cdrex); in exynos5250_system_clock_init()