Searched refs:BIT_MASK_RESP_CTS_BW_DYNBW_SEL (Results 1 – 5 of 5) sorted by relevance
26791 #define BIT_MASK_RESP_CTS_BW_DYNBW_SEL 0x3 macro26792 #define BIT_RESP_CTS_BW_DYNBW_SEL(x) (((x) & BIT_MASK_RESP_CTS_BW_DYNBW_SEL) << BIT_SHIFT_RESP_CT…26793 …SP_CTS_BW_DYNBW_SEL(x) (((x) >> BIT_SHIFT_RESP_CTS_BW_DYNBW_SEL) & BIT_MASK_RESP_CTS_BW_DYNBW_SEL)
49013 #define BIT_MASK_RESP_CTS_BW_DYNBW_SEL 0x3 macro49015 (((x) & BIT_MASK_RESP_CTS_BW_DYNBW_SEL) \49018 (BIT_MASK_RESP_CTS_BW_DYNBW_SEL << BIT_SHIFT_RESP_CTS_BW_DYNBW_SEL)49022 BIT_MASK_RESP_CTS_BW_DYNBW_SEL)
49014 #define BIT_MASK_RESP_CTS_BW_DYNBW_SEL 0x3 macro49016 (((x) & BIT_MASK_RESP_CTS_BW_DYNBW_SEL) \49019 (BIT_MASK_RESP_CTS_BW_DYNBW_SEL << BIT_SHIFT_RESP_CTS_BW_DYNBW_SEL)49023 BIT_MASK_RESP_CTS_BW_DYNBW_SEL)