Searched refs:AV1_MMU_AHB_CONTROL_BASE (Results 1 – 1 of 1) sorted by relevance
81 #define AV1_MMU_AHB_CONTROL_BASE 0x388 macro195 writel(0, iommu->bases[i] + AV1_MMU_AHB_CONTROL_BASE); in av1_iommu_disable()223 u32 val = readl(iommu->bases[i] + AV1_MMU_AHB_CONTROL_BASE); in av1_iommu_enable()230 writel(AV1_MMU_BIT_ENABLE, iommu->bases[i] + AV1_MMU_AHB_CONTROL_BASE); in av1_iommu_enable()