Searched refs:ARASAN_NAND_INT_STS_XFR_CMPLT_MASK (Results 1 – 1 of 1) sorted by relevance
103 #define ARASAN_NAND_INT_STS_XFR_CMPLT_MASK 0x04 macro385 reg_val |= ARASAN_NAND_INT_STS_XFR_CMPLT_MASK; in arasan_nand_read_page()412 ARASAN_NAND_INT_STS_XFR_CMPLT_MASK) && timeout) { in arasan_nand_read_page()422 writel(reg_val | ARASAN_NAND_INT_STS_XFR_CMPLT_MASK, in arasan_nand_read_page()425 writel(reg_val | ARASAN_NAND_INT_STS_XFR_CMPLT_MASK, in arasan_nand_read_page()554 reg_val |= ARASAN_NAND_INT_STS_XFR_CMPLT_MASK; in arasan_nand_write_page_hwecc()581 ARASAN_NAND_INT_STS_XFR_CMPLT_MASK) && timeout) { in arasan_nand_write_page_hwecc()591 writel(reg_val | ARASAN_NAND_INT_STS_XFR_CMPLT_MASK, in arasan_nand_write_page_hwecc()594 writel(reg_val | ARASAN_NAND_INT_STS_XFR_CMPLT_MASK, in arasan_nand_write_page_hwecc()629 writel(ARASAN_NAND_INT_STS_XFR_CMPLT_MASK, in arasan_nand_reset()[all …]