Searched refs:ALT_RSTMGR_PER1MODRST_WD0_SET_MSK (Results 1 – 2 of 2) sorted by relevance
133 ALT_RSTMGR_PER1MODRST_WD0_SET_MSK); in socfpga_watchdog_disable()149 val &= ALT_RSTMGR_PER1MODRST_WD0_SET_MSK; in socfpga_is_wdt_in_reset()253 ALT_RSTMGR_PER1MODRST_WD0_SET_MSK); in socfpga_reset_deassert_osc1wd0()
117 #define ALT_RSTMGR_PER1MODRST_WD0_SET_MSK BIT(0) macro