Searched refs:ADR_RX_FE_REGISTER_1 (Results 1 – 2 of 2) sorted by relevance
1187 #define ADR_RX_FE_REGISTER_1 (CSR_RF_BASE+0x00000018) macro4569 #define GET_RG_RX_SQDC (((REG32(ADR_RX_FE_REGISTER_1)) & 0x00000007 ) >> 0)4570 #define GET_RG_RX_DIV2_CORE (((REG32(ADR_RX_FE_REGISTER_1)) & 0x00000018 ) >> 3)4571 #define GET_RG_RX_LOBUF (((REG32(ADR_RX_FE_REGISTER_1)) & 0x00000060 ) >> 5)4572 #define GET_RG_TX_DPDGM_BIAS (((REG32(ADR_RX_FE_REGISTER_1)) & 0x00000780 ) >> 7)4573 #define GET_RG_TX_DPD_DIV (((REG32(ADR_RX_FE_REGISTER_1)) & 0x00007800 ) >> 11)4574 #define GET_RG_TX_TSSI_BIAS (((REG32(ADR_RX_FE_REGISTER_1)) & 0x00038000 ) >> 15)4575 #define GET_RG_TX_TSSI_DIV (((REG32(ADR_RX_FE_REGISTER_1)) & 0x001c0000 ) >> 18)4576 #define GET_RG_TX_TSSI_TESTMODE (((REG32(ADR_RX_FE_REGISTER_1)) & 0x00200000 ) >> 21)4577 #define GET_RG_TX_TSSI_TEST (((REG32(ADR_RX_FE_REGISTER_1)) & 0x00c00000 ) >> 22)[all …]
1365 SMAC_REG_WRITE(sh, ADR_RX_FE_REGISTER_1, 0x1457D79); in ssv6xxx_rate_update_rc_type()1371 SMAC_REG_WRITE(sh, ADR_RX_FE_REGISTER_1, 0x4507F9); in ssv6xxx_rate_update_rc_type()