Searched refs:ADR_CBR_SYN_RGISTER_2 (Results 1 – 2 of 2) sorted by relevance
867 #define ADR_CBR_SYN_RGISTER_2 (CBR_A_REG_BASE+0x00110040) macro3380 #define GET_CBR_RG_SX_RFCTRL_CH (((REG32(ADR_CBR_SYN_RGISTER_2)) & 0x000007ff ) >> 0)3381 #define GET_CBR_RG_SX_SEL_C3 (((REG32(ADR_CBR_SYN_RGISTER_2)) & 0x00007800 ) >> 11)3382 #define GET_CBR_RG_SX_SEL_RS (((REG32(ADR_CBR_SYN_RGISTER_2)) & 0x000f8000 ) >> 15)3383 #define GET_CBR_RG_SX_SEL_R3 (((REG32(ADR_CBR_SYN_RGISTER_2)) & 0x01f00000 ) >> 20)7021 …e SET_CBR_RG_SX_RFCTRL_CH(_VAL_) (REG32(ADR_CBR_SYN_RGISTER_2)) = (((_VAL_) << 0) | ((REG32(ADR_CB…7022 …ine SET_CBR_RG_SX_SEL_C3(_VAL_) (REG32(ADR_CBR_SYN_RGISTER_2)) = (((_VAL_) << 11) | ((REG32(ADR_CB…7023 …ine SET_CBR_RG_SX_SEL_RS(_VAL_) (REG32(ADR_CBR_SYN_RGISTER_2)) = (((_VAL_) << 15) | ((REG32(ADR_CB…7024 …ine SET_CBR_RG_SX_SEL_R3(_VAL_) (REG32(ADR_CBR_SYN_RGISTER_2)) = (((_VAL_) << 20) | ((REG32(ADR_CB…9300 #define DEF_CBR_SYN_RGISTER_2() (REG32(ADR_CBR_SYN_RGISTER_2)) = (0x00550800)
256 if ((ret = SMAC_REG_SET_BITS(sh, ADR_CBR_SYN_RGISTER_2, in ssv6xxx_set_channel()295 if ((ret = SMAC_REG_READ(sh, ADR_CBR_SYN_RGISTER_2, ®val)) != 0) break; in ssv6xxx_set_channel()