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/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8822cs/hal/halmac/
H A Dhalmac_original_h2c_ap.h95 #define ORIGINAL_H2C_SET_CMD_ID(h2c_pkt, value) \ argument
96 SET_H2C_FIELD_CLR(h2c_pkt + 0X00, 0, 5, value)
97 #define ORIGINAL_H2C_SET_CMD_ID_NO_CLR(h2c_pkt, value) \ argument
98 SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X00, 0, 5, value)
100 #define ORIGINAL_H2C_SET_CLASS(h2c_pkt, value) \ argument
101 SET_H2C_FIELD_CLR(h2c_pkt + 0X00, 5, 3, value)
102 #define ORIGINAL_H2C_SET_CLASS_NO_CLR(h2c_pkt, value) \ argument
103 SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X00, 5, 3, value)
105 #define H2C2H_LB_SET_CMD_ID(h2c_pkt, value) \ argument
106 SET_H2C_FIELD_CLR(h2c_pkt + 0X00, 0, 5, value)
[all …]
H A Dhalmac_fw_offload_h2c_ap.h109 #define H2C_CMD_HEADER_SET_CATEGORY(h2c_pkt, value) \ argument
110 SET_H2C_FIELD_CLR(h2c_pkt + 0X00, 0, 7, value)
111 #define H2C_CMD_HEADER_SET_CATEGORY_NO_CLR(h2c_pkt, value) \ argument
112 SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X00, 0, 7, value)
114 #define H2C_CMD_HEADER_SET_ACK(h2c_pkt, value) \ argument
115 SET_H2C_FIELD_CLR(h2c_pkt + 0X00, 7, 1, value)
116 #define H2C_CMD_HEADER_SET_ACK_NO_CLR(h2c_pkt, value) \ argument
117 SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X00, 7, 1, value)
120 #define H2C_CMD_HEADER_SET_TOTAL_LEN(h2c_pkt, value) \ argument
121 SET_H2C_FIELD_CLR(h2c_pkt + 0X04, 0, 16, value)
[all …]
H A Dhalmac_original_c2h_ap.h33 #define C2H_SET_CMD_ID(c2h_pkt, value) \ argument
34 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 0, 8, value)
35 #define C2H_SET_CMD_ID_NO_CLR(c2h_pkt, value) \ argument
36 SET_C2H_FIELD_NO_CLR(c2h_pkt + 0X00, 0, 8, value)
38 #define C2H_SET_SEQ(c2h_pkt, value) \ argument
39 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 8, 8, value)
40 #define C2H_SET_SEQ_NO_CLR(c2h_pkt, value) \ argument
41 SET_C2H_FIELD_NO_CLR(c2h_pkt + 0X00, 8, 8, value)
43 #define DBG_SET_CMD_ID(c2h_pkt, value) \ argument
44 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 0, 8, value)
[all …]
H A Dhalmac_fw_offload_c2h_ap.h110 #define C2H_HDR_SET_CMD_ID(c2h_pkt, value) \ argument
111 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 0, 8, value)
112 #define C2H_HDR_SET_CMD_ID_NO_CLR(c2h_pkt, value) \ argument
113 SET_C2H_FIELD_NO_CLR(c2h_pkt + 0X00, 0, 8, value)
115 #define C2H_HDR_SET_SEQ(c2h_pkt, value) \ argument
116 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 8, 8, value)
117 #define C2H_HDR_SET_SEQ_NO_CLR(c2h_pkt, value) \ argument
118 SET_C2H_FIELD_NO_CLR(c2h_pkt + 0X00, 8, 8, value)
120 #define C2H_HDR_SET_C2H_SUB_CMD_ID(c2h_pkt, value) \ argument
121 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 16, 8, value)
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H A Dhalmac_tx_desc_chip.h22 #define SET_TX_DESC_DISQSELSEQ_8814A(txdesc, value) \ argument
23 SET_TX_DESC_DISQSELSEQ(txdesc, value)
25 #define SET_TX_DESC_GF_8814A(txdesc, value) SET_TX_DESC_GF(txdesc, value) argument
27 #define SET_TX_DESC_NO_ACM_8814A(txdesc, value) \ argument
28 SET_TX_DESC_NO_ACM(txdesc, value)
30 #define SET_TX_DESC_AMSDU_PAD_EN_8814A(txdesc, value) \ argument
31 SET_TX_DESC_AMSDU_PAD_EN(txdesc, value)
33 #define SET_TX_DESC_LS_8814A(txdesc, value) SET_TX_DESC_LS(txdesc, value) argument
35 #define SET_TX_DESC_HTC_8814A(txdesc, value) SET_TX_DESC_HTC(txdesc, value) argument
37 #define SET_TX_DESC_BMC_8814A(txdesc, value) SET_TX_DESC_BMC(txdesc, value) argument
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H A Dhalmac_original_h2c_nic.h95 #define ORIGINAL_H2C_SET_CMD_ID(h2c_pkt, value) \ argument
96 SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X00, 0, 5, value)
98 #define ORIGINAL_H2C_SET_CLASS(h2c_pkt, value) \ argument
99 SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X00, 5, 3, value)
101 #define H2C2H_LB_SET_CMD_ID(h2c_pkt, value) \ argument
102 SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X00, 0, 5, value)
104 #define H2C2H_LB_SET_CLASS(h2c_pkt, value) \ argument
105 SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X00, 5, 3, value)
107 #define H2C2H_LB_SET_SEQ(h2c_pkt, value) \ argument
108 SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X00, 8, 8, value)
[all …]
H A Dhalmac_tx_desc_buffer_ap.h22 #define SET_TX_DESC_BUFFER_RDG_EN(txdesc, value) \ argument
24 value, 0x1, 31)
25 #define SET_TX_DESC_BUFFER_RDG_EN_NO_CLR(txdesc, value) \ argument
27 ((struct halmac_tx_desc *)txdesc)->dword0, value, 0x1, 31)
31 #define SET_TX_DESC_BUFFER_BCNPKT_TSF_CTRL(txdesc, value) \ argument
33 value, 0x1, 30)
34 #define SET_TX_DESC_BUFFER_BCNPKT_TSF_CTRL_NO_CLR(txdesc, value) \ argument
36 ((struct halmac_tx_desc *)txdesc)->dword0, value, 0x1, 30)
40 #define SET_TX_DESC_BUFFER_AGG_EN(txdesc, value) \ argument
42 value, 0x1, 29)
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8821cs/hal/halmac/
H A Dhalmac_original_h2c_ap.h95 #define ORIGINAL_H2C_SET_CMD_ID(h2c_pkt, value) \ argument
96 SET_H2C_FIELD_CLR(h2c_pkt + 0X00, 0, 5, value)
97 #define ORIGINAL_H2C_SET_CMD_ID_NO_CLR(h2c_pkt, value) \ argument
98 SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X00, 0, 5, value)
100 #define ORIGINAL_H2C_SET_CLASS(h2c_pkt, value) \ argument
101 SET_H2C_FIELD_CLR(h2c_pkt + 0X00, 5, 3, value)
102 #define ORIGINAL_H2C_SET_CLASS_NO_CLR(h2c_pkt, value) \ argument
103 SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X00, 5, 3, value)
105 #define H2C2H_LB_SET_CMD_ID(h2c_pkt, value) \ argument
106 SET_H2C_FIELD_CLR(h2c_pkt + 0X00, 0, 5, value)
[all …]
H A Dhalmac_fw_offload_h2c_ap.h109 #define H2C_CMD_HEADER_SET_CATEGORY(h2c_pkt, value) \ argument
110 SET_H2C_FIELD_CLR(h2c_pkt + 0X00, 0, 7, value)
111 #define H2C_CMD_HEADER_SET_CATEGORY_NO_CLR(h2c_pkt, value) \ argument
112 SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X00, 0, 7, value)
114 #define H2C_CMD_HEADER_SET_ACK(h2c_pkt, value) \ argument
115 SET_H2C_FIELD_CLR(h2c_pkt + 0X00, 7, 1, value)
116 #define H2C_CMD_HEADER_SET_ACK_NO_CLR(h2c_pkt, value) \ argument
117 SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X00, 7, 1, value)
120 #define H2C_CMD_HEADER_SET_TOTAL_LEN(h2c_pkt, value) \ argument
121 SET_H2C_FIELD_CLR(h2c_pkt + 0X04, 0, 16, value)
[all …]
H A Dhalmac_original_c2h_ap.h33 #define C2H_SET_CMD_ID(c2h_pkt, value) \ argument
34 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 0, 8, value)
35 #define C2H_SET_CMD_ID_NO_CLR(c2h_pkt, value) \ argument
36 SET_C2H_FIELD_NO_CLR(c2h_pkt + 0X00, 0, 8, value)
38 #define C2H_SET_SEQ(c2h_pkt, value) \ argument
39 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 8, 8, value)
40 #define C2H_SET_SEQ_NO_CLR(c2h_pkt, value) \ argument
41 SET_C2H_FIELD_NO_CLR(c2h_pkt + 0X00, 8, 8, value)
43 #define DBG_SET_CMD_ID(c2h_pkt, value) \ argument
44 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 0, 8, value)
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H A Dhalmac_fw_offload_c2h_ap.h110 #define C2H_HDR_SET_CMD_ID(c2h_pkt, value) \ argument
111 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 0, 8, value)
112 #define C2H_HDR_SET_CMD_ID_NO_CLR(c2h_pkt, value) \ argument
113 SET_C2H_FIELD_NO_CLR(c2h_pkt + 0X00, 0, 8, value)
115 #define C2H_HDR_SET_SEQ(c2h_pkt, value) \ argument
116 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 8, 8, value)
117 #define C2H_HDR_SET_SEQ_NO_CLR(c2h_pkt, value) \ argument
118 SET_C2H_FIELD_NO_CLR(c2h_pkt + 0X00, 8, 8, value)
120 #define C2H_HDR_SET_C2H_SUB_CMD_ID(c2h_pkt, value) \ argument
121 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 16, 8, value)
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H A Dhalmac_tx_desc_chip.h22 #define SET_TX_DESC_DISQSELSEQ_8814A(txdesc, value) \ argument
23 SET_TX_DESC_DISQSELSEQ(txdesc, value)
25 #define SET_TX_DESC_GF_8814A(txdesc, value) SET_TX_DESC_GF(txdesc, value) argument
27 #define SET_TX_DESC_NO_ACM_8814A(txdesc, value) \ argument
28 SET_TX_DESC_NO_ACM(txdesc, value)
30 #define SET_TX_DESC_AMSDU_PAD_EN_8814A(txdesc, value) \ argument
31 SET_TX_DESC_AMSDU_PAD_EN(txdesc, value)
33 #define SET_TX_DESC_LS_8814A(txdesc, value) SET_TX_DESC_LS(txdesc, value) argument
35 #define SET_TX_DESC_HTC_8814A(txdesc, value) SET_TX_DESC_HTC(txdesc, value) argument
37 #define SET_TX_DESC_BMC_8814A(txdesc, value) SET_TX_DESC_BMC(txdesc, value) argument
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H A Dhalmac_original_h2c_nic.h95 #define ORIGINAL_H2C_SET_CMD_ID(h2c_pkt, value) \ argument
96 SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X00, 0, 5, value)
98 #define ORIGINAL_H2C_SET_CLASS(h2c_pkt, value) \ argument
99 SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X00, 5, 3, value)
101 #define H2C2H_LB_SET_CMD_ID(h2c_pkt, value) \ argument
102 SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X00, 0, 5, value)
104 #define H2C2H_LB_SET_CLASS(h2c_pkt, value) \ argument
105 SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X00, 5, 3, value)
107 #define H2C2H_LB_SET_SEQ(h2c_pkt, value) \ argument
108 SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X00, 8, 8, value)
[all …]
H A Dhalmac_tx_desc_buffer_ap.h22 #define SET_TX_DESC_BUFFER_RDG_EN(txdesc, value) \ argument
24 value, 0x1, 31)
25 #define SET_TX_DESC_BUFFER_RDG_EN_NO_CLR(txdesc, value) \ argument
27 ((struct halmac_tx_desc *)txdesc)->dword0, value, 0x1, 31)
31 #define SET_TX_DESC_BUFFER_BCNPKT_TSF_CTRL(txdesc, value) \ argument
33 value, 0x1, 30)
34 #define SET_TX_DESC_BUFFER_BCNPKT_TSF_CTRL_NO_CLR(txdesc, value) \ argument
36 ((struct halmac_tx_desc *)txdesc)->dword0, value, 0x1, 30)
40 #define SET_TX_DESC_BUFFER_AGG_EN(txdesc, value) \ argument
42 value, 0x1, 29)
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8821cs/hal/halmac/
H A Dhalmac_original_h2c_ap.h96 #define ORIGINAL_H2C_SET_CMD_ID(h2c_pkt, value) \ argument
97 SET_H2C_FIELD_CLR(h2c_pkt + 0X00, 0, 5, value)
98 #define ORIGINAL_H2C_SET_CMD_ID_NO_CLR(h2c_pkt, value) \ argument
99 SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X00, 0, 5, value)
101 #define ORIGINAL_H2C_SET_CLASS(h2c_pkt, value) \ argument
102 SET_H2C_FIELD_CLR(h2c_pkt + 0X00, 5, 3, value)
103 #define ORIGINAL_H2C_SET_CLASS_NO_CLR(h2c_pkt, value) \ argument
104 SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X00, 5, 3, value)
106 #define H2C2H_LB_SET_CMD_ID(h2c_pkt, value) \ argument
107 SET_H2C_FIELD_CLR(h2c_pkt + 0X00, 0, 5, value)
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H A Dhalmac_fw_offload_h2c_ap.h110 #define H2C_CMD_HEADER_SET_CATEGORY(h2c_pkt, value) \ argument
111 SET_H2C_FIELD_CLR(h2c_pkt + 0X00, 0, 7, value)
112 #define H2C_CMD_HEADER_SET_CATEGORY_NO_CLR(h2c_pkt, value) \ argument
113 SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X00, 0, 7, value)
115 #define H2C_CMD_HEADER_SET_ACK(h2c_pkt, value) \ argument
116 SET_H2C_FIELD_CLR(h2c_pkt + 0X00, 7, 1, value)
117 #define H2C_CMD_HEADER_SET_ACK_NO_CLR(h2c_pkt, value) \ argument
118 SET_H2C_FIELD_NO_CLR(h2c_pkt + 0X00, 7, 1, value)
121 #define H2C_CMD_HEADER_SET_TOTAL_LEN(h2c_pkt, value) \ argument
122 SET_H2C_FIELD_CLR(h2c_pkt + 0X04, 0, 16, value)
[all …]
H A Dhalmac_original_c2h_ap.h34 #define C2H_SET_CMD_ID(c2h_pkt, value) \ argument
35 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 0, 8, value)
36 #define C2H_SET_CMD_ID_NO_CLR(c2h_pkt, value) \ argument
37 SET_C2H_FIELD_NO_CLR(c2h_pkt + 0X00, 0, 8, value)
39 #define C2H_SET_SEQ(c2h_pkt, value) \ argument
40 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 8, 8, value)
41 #define C2H_SET_SEQ_NO_CLR(c2h_pkt, value) \ argument
42 SET_C2H_FIELD_NO_CLR(c2h_pkt + 0X00, 8, 8, value)
44 #define DBG_SET_CMD_ID(c2h_pkt, value) \ argument
45 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 0, 8, value)
[all …]
H A Dhalmac_fw_offload_c2h_ap.h111 #define C2H_HDR_SET_CMD_ID(c2h_pkt, value) \ argument
112 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 0, 8, value)
113 #define C2H_HDR_SET_CMD_ID_NO_CLR(c2h_pkt, value) \ argument
114 SET_C2H_FIELD_NO_CLR(c2h_pkt + 0X00, 0, 8, value)
116 #define C2H_HDR_SET_SEQ(c2h_pkt, value) \ argument
117 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 8, 8, value)
118 #define C2H_HDR_SET_SEQ_NO_CLR(c2h_pkt, value) \ argument
119 SET_C2H_FIELD_NO_CLR(c2h_pkt + 0X00, 8, 8, value)
121 #define C2H_HDR_SET_C2H_SUB_CMD_ID(c2h_pkt, value) \ argument
122 SET_C2H_FIELD_CLR(c2h_pkt + 0X00, 16, 8, value)
[all …]
H A Dhalmac_tx_desc_chip.h23 #define SET_TX_DESC_DISQSELSEQ_8814A(txdesc, value) \ argument
24 SET_TX_DESC_DISQSELSEQ(txdesc, value)
26 #define SET_TX_DESC_GF_8814A(txdesc, value) SET_TX_DESC_GF(txdesc, value) argument
28 #define SET_TX_DESC_NO_ACM_8814A(txdesc, value) \ argument
29 SET_TX_DESC_NO_ACM(txdesc, value)
31 #define SET_TX_DESC_AMSDU_PAD_EN_8814A(txdesc, value) \ argument
32 SET_TX_DESC_AMSDU_PAD_EN(txdesc, value)
34 #define SET_TX_DESC_LS_8814A(txdesc, value) SET_TX_DESC_LS(txdesc, value) argument
36 #define SET_TX_DESC_HTC_8814A(txdesc, value) SET_TX_DESC_HTC(txdesc, value) argument
38 #define SET_TX_DESC_BMC_8814A(txdesc, value) SET_TX_DESC_BMC(txdesc, value) argument
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H A Dhalmac_original_h2c_nic.h96 #define ORIGINAL_H2C_SET_CMD_ID(h2c_pkt, value) \ argument
97 SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X00, 0, 5, value)
99 #define ORIGINAL_H2C_SET_CLASS(h2c_pkt, value) \ argument
100 SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X00, 5, 3, value)
102 #define H2C2H_LB_SET_CMD_ID(h2c_pkt, value) \ argument
103 SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X00, 0, 5, value)
105 #define H2C2H_LB_SET_CLASS(h2c_pkt, value) \ argument
106 SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X00, 5, 3, value)
108 #define H2C2H_LB_SET_SEQ(h2c_pkt, value) \ argument
109 SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X00, 8, 8, value)
[all …]
H A Dhalmac_tx_desc_buffer_ap.h23 #define SET_TX_DESC_BUFFER_RDG_EN(txdesc, value) \ argument
25 value, 0x1, 31)
26 #define SET_TX_DESC_BUFFER_RDG_EN_NO_CLR(txdesc, value) \ argument
28 ((struct halmac_tx_desc *)txdesc)->dword0, value, 0x1, 31)
32 #define SET_TX_DESC_BUFFER_BCNPKT_TSF_CTRL(txdesc, value) \ argument
34 value, 0x1, 30)
35 #define SET_TX_DESC_BUFFER_BCNPKT_TSF_CTRL_NO_CLR(txdesc, value) \ argument
37 ((struct halmac_tx_desc *)txdesc)->dword0, value, 0x1, 30)
41 #define SET_TX_DESC_BUFFER_AGG_EN(txdesc, value) \ argument
43 value, 0x1, 29)
[all …]
H A Dhalmac_tx_desc_buffer_nic.h23 #define SET_TX_DESC_BUFFER_RDG_EN(txdesc, value) \ argument
24 SET_BITS_TO_LE_4BYTE(txdesc + 0x00, 31, 1, value)
26 #define SET_TX_DESC_BUFFER_BCNPKT_TSF_CTRL(txdesc, value) \ argument
27 SET_BITS_TO_LE_4BYTE(txdesc + 0x00, 30, 1, value)
30 #define SET_TX_DESC_BUFFER_AGG_EN(txdesc, value) \ argument
31 SET_BITS_TO_LE_4BYTE(txdesc + 0x00, 29, 1, value)
33 #define SET_TX_DESC_BUFFER_PKT_OFFSET(txdesc, value) \ argument
34 SET_BITS_TO_LE_4BYTE(txdesc + 0x00, 24, 5, value)
37 #define SET_TX_DESC_BUFFER_OFFSET(txdesc, value) \ argument
38 SET_BITS_TO_LE_4BYTE(txdesc + 0x00, 16, 8, value)
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822bs/hal/halmac/
H A Dhalmac_tx_desc_chip.h22 #define SET_TX_DESC_DISQSELSEQ_8814A(txdesc, value) \ argument
23 SET_TX_DESC_DISQSELSEQ(txdesc, value)
25 #define SET_TX_DESC_GF_8814A(txdesc, value) SET_TX_DESC_GF(txdesc, value) argument
27 #define SET_TX_DESC_NO_ACM_8814A(txdesc, value) \ argument
28 SET_TX_DESC_NO_ACM(txdesc, value)
30 #define SET_TX_DESC_AMSDU_PAD_EN_8814A(txdesc, value) \ argument
31 SET_TX_DESC_AMSDU_PAD_EN(txdesc, value)
33 #define SET_TX_DESC_LS_8814A(txdesc, value) SET_TX_DESC_LS(txdesc, value) argument
35 #define SET_TX_DESC_HTC_8814A(txdesc, value) SET_TX_DESC_HTC(txdesc, value) argument
37 #define SET_TX_DESC_BMC_8814A(txdesc, value) SET_TX_DESC_BMC(txdesc, value) argument
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H A Dhalmac_original_h2c_nic.h95 #define ORIGINAL_H2C_SET_CMD_ID(h2c_pkt, value) \ argument
96 SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X00, 0, 5, value)
98 #define ORIGINAL_H2C_SET_CLASS(h2c_pkt, value) \ argument
99 SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X00, 5, 3, value)
101 #define H2C2H_LB_SET_CMD_ID(h2c_pkt, value) \ argument
102 SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X00, 0, 5, value)
104 #define H2C2H_LB_SET_CLASS(h2c_pkt, value) \ argument
105 SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X00, 5, 3, value)
107 #define H2C2H_LB_SET_SEQ(h2c_pkt, value) \ argument
108 SET_BITS_TO_LE_4BYTE(h2c_pkt + 0X00, 8, 8, value)
[all …]
H A Dhalmac_tx_desc_buffer_chip.h22 #define SET_TX_DESC_BUFFER_RDG_EN_8814B(txdesc, value) \ argument
23 SET_TX_DESC_BUFFER_RDG_EN(txdesc, value)
26 #define SET_TX_DESC_BUFFER_BCNPKT_TSF_CTRL_8814B(txdesc, value) \ argument
27 SET_TX_DESC_BUFFER_BCNPKT_TSF_CTRL(txdesc, value)
30 #define SET_TX_DESC_BUFFER_AGG_EN_8814B(txdesc, value) \ argument
31 SET_TX_DESC_BUFFER_AGG_EN(txdesc, value)
34 #define SET_TX_DESC_BUFFER_PKT_OFFSET_8814B(txdesc, value) \ argument
35 SET_TX_DESC_BUFFER_PKT_OFFSET(txdesc, value)
38 #define SET_TX_DESC_BUFFER_OFFSET_8814B(txdesc, value) \ argument
39 SET_TX_DESC_BUFFER_OFFSET(txdesc, value)
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