1 /* 2 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu> 3 * (C) Copyright 2013 Xilinx, Inc. 4 * 5 * Common configuration options for all Zynq boards. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_ZYNQ_COMMON_H 11 #define __CONFIG_ZYNQ_COMMON_H 12 13 /* CPU clock */ 14 #ifndef CONFIG_CPU_FREQ_HZ 15 # define CONFIG_CPU_FREQ_HZ 800000000 16 #endif 17 18 /* Cache options */ 19 #define CONFIG_SYS_L2CACHE_OFF 20 #ifndef CONFIG_SYS_L2CACHE_OFF 21 # define CONFIG_SYS_L2_PL310 22 # define CONFIG_SYS_PL310_BASE 0xf8f02000 23 #endif 24 25 #define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600 26 #define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR 27 #define CONFIG_SYS_TIMER_COUNTS_DOWN 28 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) 29 30 /* Serial drivers */ 31 /* The following table includes the supported baudrates */ 32 #define CONFIG_SYS_BAUDRATE_TABLE \ 33 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} 34 35 #define CONFIG_ARM_DCC 36 #define CONFIG_ZYNQ_SERIAL 37 38 /* Ethernet driver */ 39 #if defined(CONFIG_ZYNQ_GEM) 40 # define CONFIG_MII 41 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 42 # define CONFIG_PHY_MARVELL 43 # define CONFIG_PHY_REALTEK 44 # define CONFIG_PHY_XILINX 45 # define CONFIG_BOOTP_BOOTPATH 46 # define CONFIG_BOOTP_GATEWAY 47 # define CONFIG_BOOTP_HOSTNAME 48 # define CONFIG_BOOTP_MAY_FAIL 49 #endif 50 51 /* SPI */ 52 #ifdef CONFIG_ZYNQ_SPI 53 #endif 54 55 /* QSPI */ 56 #ifdef CONFIG_ZYNQ_QSPI 57 # define CONFIG_SF_DEFAULT_SPEED 30000000 58 #endif 59 60 /* NOR */ 61 #ifdef CONFIG_MTD_NOR_FLASH 62 # define CONFIG_SYS_FLASH_BASE 0xE2000000 63 # define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024) 64 # define CONFIG_SYS_MAX_FLASH_BANKS 1 65 # define CONFIG_SYS_MAX_FLASH_SECT 512 66 # define CONFIG_SYS_FLASH_ERASE_TOUT 1000 67 # define CONFIG_SYS_FLASH_WRITE_TOUT 5000 68 # define CONFIG_FLASH_SHOW_PROGRESS 10 69 # define CONFIG_SYS_FLASH_CFI 70 # undef CONFIG_SYS_FLASH_EMPTY_INFO 71 # define CONFIG_FLASH_CFI_DRIVER 72 # undef CONFIG_SYS_FLASH_PROTECTION 73 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 74 #endif 75 76 #ifdef CONFIG_NAND_ZYNQ 77 #define CONFIG_SYS_MAX_NAND_DEVICE 1 78 #define CONFIG_SYS_NAND_ONFI_DETECTION 79 #endif 80 81 /* MMC */ 82 #if defined(CONFIG_MMC_SDHCI_ZYNQ) 83 # define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000 84 #endif 85 86 #ifdef CONFIG_USB_EHCI_ZYNQ 87 # define CONFIG_EHCI_IS_TDI 88 89 # define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000 90 # define DFU_DEFAULT_POLL_TIMEOUT 300 91 # define CONFIG_USB_CABLE_CHECK 92 # define CONFIG_THOR_RESET_OFF 93 # define CONFIG_USB_FUNCTION_THOR 94 # define DFU_ALT_INFO_RAM \ 95 "dfu_ram_info=" \ 96 "set dfu_alt_info " \ 97 "${kernel_image} ram 0x3000000 0x500000\\\\;" \ 98 "${devicetree_image} ram 0x2A00000 0x20000\\\\;" \ 99 "${ramdisk_image} ram 0x2000000 0x600000\0" \ 100 "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \ 101 "thor_ram=run dfu_ram_info && thordown 0 ram 0\0" 102 103 # if defined(CONFIG_MMC_SDHCI_ZYNQ) 104 # define DFU_ALT_INFO_MMC \ 105 "dfu_mmc_info=" \ 106 "set dfu_alt_info " \ 107 "${kernel_image} fat 0 1\\\\;" \ 108 "${devicetree_image} fat 0 1\\\\;" \ 109 "${ramdisk_image} fat 0 1\0" \ 110 "dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \ 111 "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0" 112 113 # define DFU_ALT_INFO \ 114 DFU_ALT_INFO_RAM \ 115 DFU_ALT_INFO_MMC 116 # else 117 # define DFU_ALT_INFO \ 118 DFU_ALT_INFO_RAM 119 # endif 120 #endif 121 122 #if !defined(DFU_ALT_INFO) 123 # define DFU_ALT_INFO 124 #endif 125 126 #if defined(CONFIG_MMC_SDHCI_ZYNQ) || defined(CONFIG_ZYNQ_USB) 127 # define CONFIG_SUPPORT_VFAT 128 #endif 129 130 #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1) 131 #define CONFIG_SYS_I2C_ZYNQ 132 #endif 133 134 /* I2C */ 135 #if defined(CONFIG_SYS_I2C_ZYNQ) 136 # define CONFIG_SYS_I2C 137 # define CONFIG_SYS_I2C_ZYNQ_SPEED 100000 138 # define CONFIG_SYS_I2C_ZYNQ_SLAVE 0 139 #endif 140 141 /* EEPROM */ 142 #ifdef CONFIG_ZYNQ_EEPROM 143 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 144 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 145 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 146 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 147 # define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */ 148 #endif 149 150 /* Total Size of Environment Sector */ 151 #define CONFIG_ENV_SIZE (128 << 10) 152 153 /* Allow to overwrite serial and ethaddr */ 154 #define CONFIG_ENV_OVERWRITE 155 156 /* Environment */ 157 #ifndef CONFIG_ENV_IS_NOWHERE 158 # ifdef CONFIG_MTD_NOR_FLASH 159 /* Environment in NOR flash */ 160 # elif defined(CONFIG_ZYNQ_QSPI) 161 /* Environment in Serial Flash */ 162 # endif 163 164 # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE 165 # define CONFIG_ENV_OFFSET 0xE0000 166 #endif 167 168 /* enable preboot to be loaded before CONFIG_BOOTDELAY */ 169 #define CONFIG_PREBOOT 170 171 /* Boot configuration */ 172 #define CONFIG_BOOTCOMMAND "run $modeboot || run distro_bootcmd" 173 #define CONFIG_SYS_LOAD_ADDR 0 /* default? */ 174 175 /* Distro boot enablement */ 176 177 #ifdef CONFIG_SPL_BUILD 178 #define BOOTENV 179 #else 180 #include <config_distro_defaults.h> 181 182 #ifdef CONFIG_CMD_MMC 183 #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) 184 #else 185 #define BOOT_TARGET_DEVICES_MMC(func) 186 #endif 187 188 #ifdef CONFIG_CMD_USB 189 #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) 190 #else 191 #define BOOT_TARGET_DEVICES_USB(func) 192 #endif 193 194 #if defined(CONFIG_CMD_PXE) 195 #define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na) 196 #else 197 #define BOOT_TARGET_DEVICES_PXE(func) 198 #endif 199 200 #if defined(CONFIG_CMD_DHCP) 201 #define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na) 202 #else 203 #define BOOT_TARGET_DEVICES_DHCP(func) 204 #endif 205 206 #define BOOT_TARGET_DEVICES(func) \ 207 BOOT_TARGET_DEVICES_MMC(func) \ 208 BOOT_TARGET_DEVICES_USB(func) \ 209 BOOT_TARGET_DEVICES_PXE(func) \ 210 BOOT_TARGET_DEVICES_DHCP(func) 211 212 #include <config_distro_bootcmd.h> 213 #endif /* CONFIG_SPL_BUILD */ 214 215 /* Default environment */ 216 #ifndef CONFIG_EXTRA_ENV_SETTINGS 217 #define CONFIG_EXTRA_ENV_SETTINGS \ 218 "fit_image=fit.itb\0" \ 219 "load_addr=0x2000000\0" \ 220 "fit_size=0x800000\0" \ 221 "flash_off=0x100000\0" \ 222 "nor_flash_off=0xE2100000\0" \ 223 "fdt_high=0x20000000\0" \ 224 "initrd_high=0x20000000\0" \ 225 "loadbootenv_addr=0x2000000\0" \ 226 "fdt_addr_r=0x1f00000\0" \ 227 "pxefile_addr_r=0x2000000\0" \ 228 "kernel_addr_r=0x2000000\0" \ 229 "scriptaddr=0x3000000\0" \ 230 "ramdisk_addr_r=0x3100000\0" \ 231 "bootenv=uEnv.txt\0" \ 232 "bootenv_dev=mmc\0" \ 233 "loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \ 234 "importbootenv=echo Importing environment from ${bootenv_dev} ...; " \ 235 "env import -t ${loadbootenv_addr} $filesize\0" \ 236 "bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \ 237 "setbootenv=if env run bootenv_existence_test; then " \ 238 "if env run loadbootenv; then " \ 239 "env run importbootenv; " \ 240 "fi; " \ 241 "fi; \0" \ 242 "sd_loadbootenv=set bootenv_dev mmc && " \ 243 "run setbootenv \0" \ 244 "usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv \0" \ 245 "preboot=if test $modeboot = sdboot; then " \ 246 "run sd_loadbootenv; " \ 247 "echo Checking if uenvcmd is set ...; " \ 248 "if test -n $uenvcmd; then " \ 249 "echo Running uenvcmd ...; " \ 250 "run uenvcmd; " \ 251 "fi; " \ 252 "fi; \0" \ 253 "norboot=echo Copying FIT from NOR flash to RAM... && " \ 254 "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \ 255 "bootm ${load_addr}\0" \ 256 "sdboot=echo Copying FIT from SD to RAM... && " \ 257 "load mmc 0 ${load_addr} ${fit_image} && " \ 258 "bootm ${load_addr}\0" \ 259 "jtagboot=echo TFTPing FIT to RAM... && " \ 260 "tftpboot ${load_addr} ${fit_image} && " \ 261 "bootm ${load_addr}\0" \ 262 "usbboot=if usb start; then " \ 263 "echo Copying FIT from USB to RAM... && " \ 264 "load usb 0 ${load_addr} ${fit_image} && " \ 265 "bootm ${load_addr}; fi\0" \ 266 DFU_ALT_INFO \ 267 BOOTENV 268 #endif 269 270 /* Miscellaneous configurable options */ 271 272 #define CONFIG_CMDLINE_EDITING 273 #define CONFIG_AUTO_COMPLETE 274 #define CONFIG_SYS_LONGHELP 275 #define CONFIG_CLOCKS 276 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 277 278 #ifndef CONFIG_NR_DRAM_BANKS 279 # define CONFIG_NR_DRAM_BANKS 1 280 #endif 281 282 #define CONFIG_SYS_MEMTEST_START 0 283 #define CONFIG_SYS_MEMTEST_END 0x1000 284 285 #define CONFIG_SYS_MALLOC_LEN 0x1400000 286 287 #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000 288 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 289 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 290 CONFIG_SYS_INIT_RAM_SIZE - \ 291 GENERATED_GBL_DATA_SIZE) 292 293 /* Enable the PL to be downloaded */ 294 #define CONFIG_FPGA 295 #define CONFIG_FPGA_XILINX 296 #define CONFIG_FPGA_ZYNQPL 297 298 /* FIT support */ 299 #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */ 300 301 /* FDT support */ 302 #define CONFIG_DISPLAY_BOARDINFO_LATE 303 304 /* Extend size of kernel image for uncompression */ 305 #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) 306 307 /* Boot FreeBSD/vxWorks from an ELF image */ 308 #define CONFIG_SYS_MMC_MAX_DEVICE 1 309 310 #define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds" 311 312 /* Commands */ 313 314 /* SPL part */ 315 #define CONFIG_SPL_FRAMEWORK 316 317 /* MMC support */ 318 #ifdef CONFIG_MMC_SDHCI_ZYNQ 319 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 320 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 321 #endif 322 323 /* Disable dcache for SPL just for sure */ 324 #ifdef CONFIG_SPL_BUILD 325 #define CONFIG_SYS_DCACHE_OFF 326 #undef CONFIG_FPGA 327 #endif 328 329 /* Address in RAM where the parameters must be copied by SPL. */ 330 #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000 331 332 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb" 333 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" 334 335 /* Not using MMC raw mode - just for compilation purpose */ 336 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 337 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 338 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 339 340 /* qspi mode is working fine */ 341 #ifdef CONFIG_ZYNQ_QSPI 342 #define CONFIG_SPL_SPI_LOAD 343 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000 344 #define CONFIG_SYS_SPI_ARGS_OFFS 0x200000 345 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000 346 #define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \ 347 CONFIG_SYS_SPI_ARGS_SIZE) 348 #endif 349 350 /* for booting directly linux */ 351 352 /* SP location before relocation, must use scratch RAM */ 353 #define CONFIG_SPL_TEXT_BASE 0x0 354 355 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */ 356 #define CONFIG_SPL_MAX_SIZE 0x30000 357 358 /* The highest 64k OCM address */ 359 #define OCM_HIGH_ADDR 0xffff0000 360 361 /* On the top of OCM space */ 362 #define CONFIG_SYS_SPL_MALLOC_START OCM_HIGH_ADDR 363 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000 364 365 /* 366 * SPL stack position - and stack goes down 367 * 0xfffffe00 is used for putting wfi loop. 368 * Set it up as limit for now. 369 */ 370 #define CONFIG_SPL_STACK 0xfffffe00 371 372 /* BSS setup */ 373 #define CONFIG_SPL_BSS_START_ADDR 0x100000 374 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 375 376 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 377 378 #endif /* __CONFIG_ZYNQ_COMMON_H */ 379