1 /* 2 * ynr_uapi_head_v3.h 3 * 4 * Copyright (c) 2022 Rockchip Corporation 5 * 6 * Licensed under the Apache License, Version 2.0 (the "License"); 7 * you may not use this file except in compliance with the License. 8 * You may obtain a copy of the License at 9 * 10 * http://www.apache.org/licenses/LICENSE-2.0 11 * 12 * Unless required by applicable law or agreed to in writing, software 13 * distributed under the License is distributed on an "AS IS" BASIS, 14 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 * See the License for the specific language governing permissions and 16 * limitations under the License. 17 * 18 */ 19 20 #ifndef __CALIBDBV2_UAPI_YNRV3_HEADER_H__ 21 #define __CALIBDBV2_UAPI_YNRV3_HEADER_H__ 22 23 #include "rk_aiq_comm.h" 24 25 RKAIQ_BEGIN_DECLARE 26 27 #define YNR_V3_ISO_CURVE_POINT_BIT 4 28 #define YNR_V3_ISO_CURVE_POINT_NUM ((1 << YNR_V3_ISO_CURVE_POINT_BIT)+1) 29 30 typedef struct RK_YNR_Params_V3_Select_s 31 { 32 // M4_BOOL_DESC("enable", "1") 33 int enable; 34 35 // M4_BOOL_DESC("ynr_bft3x3_bypass", "0") 36 int ynr_bft3x3_bypass; 37 // M4_BOOL_DESC("ynr_lbft5x5_bypass", "0") 38 int ynr_lbft5x5_bypass; 39 // M4_BOOL_DESC("ynr_lgft3x3_bypass", "0") 40 int ynr_lgft3x3_bypass; 41 // M4_BOOL_DESC("ynr_flt1x1_bypass", "0") 42 int ynr_flt1x1_bypass; 43 // M4_BOOL_DESC("ynr_sft5x5_bypass", "0") 44 int ynr_sft5x5_bypass; 45 46 // M4_ARRAY_DESC("lumaPoint", "s16", M4_SIZE(1,17), M4_RANGE(0, 1024), "[0,64,128,192,256,320,384,448,512,576,640,704,768,832,896,960,1024]", M4_DIGIT(0), M4_DYNAMIC(0)) 47 int16_t lumaPoint[YNR_V3_ISO_CURVE_POINT_NUM]; 48 49 // M4_ARRAY_DESC("sigma", "f32", M4_SIZE(1,17), M4_RANGE(0, 4095), "[32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32]", M4_DIGIT(3), M4_DYNAMIC(0)) 50 float sigma[YNR_V3_ISO_CURVE_POINT_NUM]; 51 52 // M4_ARRAY_DESC("lo_lumaPoint", "f32", M4_SIZE(1,6), M4_RANGE(0,256), "[0,32,64,128,192,256]", M4_DIGIT(0), M4_DYNAMIC(0)) 53 float lo_lumaPoint[6]; 54 // M4_ARRAY_DESC("lo_ratio", "f32", M4_SIZE(1,6), M4_RANGE(0,2), "[1,1,1,1,1,1]", M4_DIGIT(2), M4_DYNAMIC(0)) 55 float lo_ratio[6]; 56 // M4_ARRAY_DESC("hi_lumaPoint", "f32", M4_SIZE(1,6), M4_RANGE(0,256), "[0,32,64,128,192,256]", M4_DIGIT(0), M4_DYNAMIC(0)) 57 float hi_lumaPoint[6]; 58 // M4_ARRAY_DESC("hi_ratio", "f32", M4_SIZE(1,6), M4_RANGE(0,2), "[1,1,1,1,1,1]", M4_DIGIT(2), M4_DYNAMIC(0)) 59 float hi_ratio[6]; 60 61 // M4_ARRAY_DESC("rnr_strength", "f32", M4_SIZE(1,17), M4_RANGE(0,16), "1.0", M4_DIGIT(3), M4_DYNAMIC(0)) 62 float rnr_strength[17]; 63 64 // M4_NUMBER_DESC("lci", "f32", M4_RANGE(0.0, 2.0), "0.5", M4_DIGIT(3)) 65 float lci; 66 // M4_NUMBER_DESC("hci", "f32", M4_RANGE(0.0, 2.0), "0.5", M4_DIGIT(3)) 67 float hci; 68 69 // M4_NUMBER_DESC("ynr_global_gain_alpha", "f32", M4_RANGE(0, 1.0), "0", M4_DIGIT(2)) 70 float ynr_global_gain_alpha; 71 // M4_NUMBER_DESC("ynr_global_gain", "f32", M4_RANGE(0, 64.0), "1.0", M4_DIGIT(2)) 72 float ynr_global_gain; 73 // M4_NUMBER_DESC("ynr_adjust_thresh", "f32", M4_RANGE(0, 1.0), "1.0", M4_DIGIT(2)) 74 float ynr_adjust_thresh; 75 // M4_NUMBER_DESC("ynr_adjust_scale", "f32", M4_RANGE(0, 16.0), "1.0", M4_DIGIT(2)) 76 float ynr_adjust_scale; 77 78 // M4_NUMBER_DESC("low_bf1", "f32", M4_RANGE(0.1, 32), "0.5", M4_DIGIT(2)) 79 float low_bf1; 80 // M4_NUMBER_DESC("low_bf2", "f32", M4_RANGE(0.1, 32), "0.5", M4_DIGIT(2)) 81 float low_bf2; 82 83 // M4_NUMBER_DESC("low_thred_adj", "f32", M4_RANGE(0.0, 31.0), "0.25", M4_DIGIT(2)) 84 float low_thred_adj; 85 // M4_NUMBER_DESC("low_peak_supress", "f32", M4_RANGE(0.0, 1.0), "0.5", M4_DIGIT(2)) 86 float low_peak_supress; 87 // M4_NUMBER_DESC("low_edge_adj_thresh", "f32", M4_RANGE(0.0, 1023.0), "7", M4_DIGIT(2)) 88 float low_edge_adj_thresh; 89 // M4_NUMBER_DESC("low_lbf_weight_thresh", "f32", M4_RANGE(0.0, 1.0), "0.25", M4_DIGIT(2)) 90 float low_lbf_weight_thresh; 91 // M4_NUMBER_DESC("low_center_weight", "f32", M4_RANGE(0.0, 1.0), "0.5", M4_DIGIT(2)) 92 float low_center_weight; 93 // M4_NUMBER_DESC("low_dist_adj", "f32", M4_RANGE(0.0, 127.0), "8.0", M4_DIGIT(2)) 94 float low_dist_adj; 95 // M4_NUMBER_DESC("low_weight", "f32", M4_RANGE(0.0, 1.0), "0.5", M4_DIGIT(2)) 96 float low_weight; 97 // M4_NUMBER_DESC("low_filt1_strength", "f32", M4_RANGE(0.0, 1.0), "0.7", M4_DIGIT(2)) 98 float low_filt1_strength; 99 // M4_NUMBER_DESC("low_filt2_strength", "f32", M4_RANGE(0.0, 1.0), "0.85", M4_DIGIT(2)) 100 float low_filt2_strength; 101 // M4_NUMBER_DESC("low_bi_weight", "f32", M4_RANGE(0.0, 1.0), "0.2", M4_DIGIT(2)) 102 float low_bi_weight; 103 104 // M4_NUMBER_DESC("base_filter_weight1", "f32", M4_RANGE(0.0, 1.0), "0.28", M4_DIGIT(2)) 105 float base_filter_weight1; 106 // M4_NUMBER_DESC("base_filter_weight2", "f32", M4_RANGE(0.0, 1.0), "0.46", M4_DIGIT(2)) 107 float base_filter_weight2; 108 // M4_NUMBER_DESC("base_filter_weight3", "f32", M4_RANGE(0.0, 1.0), "0.26", M4_DIGIT(2)) 109 float base_filter_weight3; 110 111 112 // M4_NUMBER_DESC("high_thred_adj", "f32", M4_RANGE(0.0, 31.0), "0.5", M4_DIGIT(2)) 113 float high_thred_adj; 114 // M4_NUMBER_DESC("high_weight", "f32", M4_RANGE(0.0, 1.0), "0.5", M4_DIGIT(2)) 115 float high_weight; 116 // M4_NUMBER_DESC("hi_min_adj", "f32", M4_RANGE(0.0, 1.0), "0.9", M4_DIGIT(2)) 117 float hi_min_adj; 118 // M4_NUMBER_DESC("hi_edge_thed", "f32", M4_RANGE(0.0, 255.0), "100.0", M4_DIGIT(2)) 119 float hi_edge_thed; 120 // M4_ARRAY_DESC("high_direction_weight", "f32", M4_SIZE(1,8), M4_RANGE(0,1.0), "[1 1 1 1 0.5 0.5 0.5 0.5]", M4_DIGIT(2), M4_DYNAMIC(0)) 121 float high_direction_weight[8]; 122 123 } RK_YNR_Params_V3_Select_t; 124 125 typedef struct Aynr_ExpInfo_V3_s { 126 127 // M4_NUMBER_DESC("hdr_mode", "u8", M4_RANGE(0, 2), "0", M4_DIGIT(0)) 128 int hdr_mode; 129 // M4_NUMBER_DESC("snr_mode", "s8", M4_RANGE(0, 2), "0", M4_DIGIT(0)) 130 int snr_mode; 131 132 // M4_ARRAY_DESC("time", "f32", M4_SIZE(1,3), M4_RANGE(0, 1024), "0.01", M4_DIGIT(6)) 133 float arTime[3]; 134 // M4_ARRAY_DESC("again", "f32", M4_SIZE(1,3), M4_RANGE(0, 204800), "1", M4_DIGIT(3)) 135 float arAGain[3]; 136 // M4_ARRAY_DESC("dgain", "f32", M4_SIZE(1,3), M4_RANGE(0, 204800), "1", M4_DIGIT(3)) 137 float arDGain[3]; 138 // M4_ARRAY_DESC("iso", "u32", M4_SIZE(1,3), M4_RANGE(0, 204800), "1", M4_DIGIT(0)) 139 int arIso[3]; 140 141 // M4_NUMBER_DESC("isoLow", "u32", M4_RANGE(0, 204800), "50", M4_DIGIT(0)) 142 int isoLow; 143 // M4_NUMBER_DESC("isoHigh", "u32", M4_RANGE(0, 204800), "50", M4_DIGIT(0)) 144 int isoHigh; 145 146 // M4_NUMBER_DESC("rawWidth", "s32", M4_RANGE(0, 65535), "0", M4_DIGIT(0)) 147 int rawWidth; 148 // M4_NUMBER_DESC("rawHeight", "s32", M4_RANGE(0, 65535), "0", M4_DIGIT(0)) 149 int rawHeight; 150 } Aynr_ExpInfo_V3_t; 151 152 153 154 typedef struct rk_aiq_ynr_info_v3_s { 155 // M4_ARRAY_TABLE_DESC("sync", "array_table_ui", "none", "1") 156 rk_aiq_uapi_sync_t sync; 157 // M4_NUMBER_DESC("iso", "u32", M4_RANGE(0, 204800), "50", M4_DIGIT(0), "0", "0") 158 int iso; 159 // M4_ARRAY_TABLE_DESC("expo_info", "normal_ui_style", "none", "0", "0") 160 Aynr_ExpInfo_V3_t expo_info; 161 } rk_aiq_ynr_info_v3_t; 162 163 164 165 RKAIQ_END_DECLARE 166 167 #endif 168