1 /* 2 * 3 * Copyright (c) Fuzhou Rockchip Electronics Co.Ltd 4 * Authors: 5 * Mark Yao <yzq@rock-chips.com> 6 * 7 * base on exynos_drm.h 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License as published by the 11 * Free Software Foundation; either version 2 of the License, or (at your 12 * option) any later version. 13 */ 14 15 #ifndef _UAPI_ROCKCHIP_DRM_H 16 #define _UAPI_ROCKCHIP_DRM_H 17 18 #ifdef __KERNEL__ 19 #include <linux/types.h> 20 #else 21 #include <stdint.h> 22 #endif 23 24 #include <drm/drm.h> 25 26 /* 27 * Send vcnt event instead of blocking, 28 * like _DRM_VBLANK_EVENT 29 */ 30 #define _DRM_ROCKCHIP_VCNT_EVENT 0x80000000 31 #define DRM_EVENT_ROCKCHIP_CRTC_VCNT 0xf 32 33 /* memory type definitions. */ 34 enum drm_rockchip_gem_mem_type { 35 /* Physically Continuous memory. */ 36 ROCKCHIP_BO_CONTIG = 1 << 0, 37 /* cachable mapping. */ 38 ROCKCHIP_BO_CACHABLE = 1 << 1, 39 /* write-combine mapping. */ 40 ROCKCHIP_BO_WC = 1 << 2, 41 ROCKCHIP_BO_SECURE = 1 << 3, 42 /* keep kmap for cma buffer or alloc kmap for other type memory */ 43 ROCKCHIP_BO_ALLOC_KMAP = 1 << 4, 44 /* alloc page with gfp_dma32 */ 45 ROCKCHIP_BO_DMA32 = 1 << 5, 46 ROCKCHIP_BO_MASK = ROCKCHIP_BO_CONTIG | ROCKCHIP_BO_CACHABLE | 47 ROCKCHIP_BO_WC | ROCKCHIP_BO_SECURE | ROCKCHIP_BO_ALLOC_KMAP | 48 ROCKCHIP_BO_DMA32, 49 }; 50 51 /** 52 * User-desired buffer creation information structure. 53 * 54 * @size: user-desired memory allocation size. 55 * @flags: user request for setting memory type or cache attributes. 56 * @handle: returned a handle to created gem object. 57 * - this handle will be set by gem module of kernel side. 58 */ 59 struct drm_rockchip_gem_create { 60 uint64_t size; 61 uint32_t flags; 62 uint32_t handle; 63 }; 64 65 struct drm_rockchip_gem_phys { 66 uint32_t handle; 67 uint32_t phy_addr; 68 }; 69 70 /** 71 * A structure for getting buffer offset. 72 * 73 * @handle: a pointer to gem object created. 74 * @pad: just padding to be 64-bit aligned. 75 * @offset: relatived offset value of the memory region allocated. 76 * - this value should be set by user. 77 */ 78 struct drm_rockchip_gem_map_off { 79 uint32_t handle; 80 uint32_t pad; 81 uint64_t offset; 82 }; 83 84 /* acquire type definitions. */ 85 enum drm_rockchip_gem_cpu_acquire_type { 86 DRM_ROCKCHIP_GEM_CPU_ACQUIRE_SHARED = 0x0, 87 DRM_ROCKCHIP_GEM_CPU_ACQUIRE_EXCLUSIVE = 0x1, 88 }; 89 90 enum rockchip_crtc_feture { 91 ROCKCHIP_DRM_CRTC_FEATURE_ALPHA_SCALE, 92 ROCKCHIP_DRM_CRTC_FEATURE_HDR10, 93 ROCKCHIP_DRM_CRTC_FEATURE_NEXT_HDR, 94 }; 95 96 enum rockchip_plane_feture { 97 ROCKCHIP_DRM_PLANE_FEATURE_SCALE, 98 ROCKCHIP_DRM_PLANE_FEATURE_ALPHA, 99 ROCKCHIP_DRM_PLANE_FEATURE_HDR2SDR, 100 ROCKCHIP_DRM_PLANE_FEATURE_SDR2HDR, 101 ROCKCHIP_DRM_PLANE_FEATURE_AFBDC, 102 ROCKCHIP_DRM_PLANE_FEATURE_PDAF_POS, 103 ROCKCHIP_DRM_PLANE_FEATURE_MAX, 104 }; 105 106 enum rockchip_cabc_mode { 107 ROCKCHIP_DRM_CABC_MODE_DISABLE, 108 ROCKCHIP_DRM_CABC_MODE_NORMAL, 109 ROCKCHIP_DRM_CABC_MODE_LOWPOWER, 110 ROCKCHIP_DRM_CABC_MODE_USERSPACE, 111 }; 112 113 #define DRM_ROCKCHIP_GEM_CREATE 0x00 114 #define DRM_ROCKCHIP_GEM_MAP_OFFSET 0x01 115 #define DRM_ROCKCHIP_GEM_CPU_ACQUIRE 0x02 116 #define DRM_ROCKCHIP_GEM_CPU_RELEASE 0x03 117 #define DRM_ROCKCHIP_GEM_GET_PHYS 0x04 118 #define DRM_ROCKCHIP_GET_VCNT_EVENT 0x05 119 120 #define DRM_IOCTL_ROCKCHIP_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + \ 121 DRM_ROCKCHIP_GEM_CREATE, struct drm_rockchip_gem_create) 122 123 #define DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET DRM_IOWR(DRM_COMMAND_BASE + \ 124 DRM_ROCKCHIP_GEM_MAP_OFFSET, struct drm_rockchip_gem_map_off) 125 126 #define DRM_IOCTL_ROCKCHIP_GEM_CPU_ACQUIRE DRM_IOWR(DRM_COMMAND_BASE + \ 127 DRM_ROCKCHIP_GEM_CPU_ACQUIRE, struct drm_rockchip_gem_cpu_acquire) 128 129 #define DRM_IOCTL_ROCKCHIP_GEM_CPU_RELEASE DRM_IOWR(DRM_COMMAND_BASE + \ 130 DRM_ROCKCHIP_GEM_CPU_RELEASE, struct drm_rockchip_gem_cpu_release) 131 132 #define DRM_IOCTL_ROCKCHIP_GEM_GET_PHYS DRM_IOWR(DRM_COMMAND_BASE + \ 133 DRM_ROCKCHIP_GEM_GET_PHYS, struct drm_rockchip_gem_phys) 134 135 #define DRM_IOCTL_ROCKCHIP_GET_VCNT_EVENT DRM_IOWR(DRM_COMMAND_BASE + \ 136 DRM_ROCKCHIP_GET_VCNT_EVENT, union drm_wait_vblank) 137 138 #endif /* _UAPI_ROCKCHIP_DRM_H */ 139