1 /*
2 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6 #ifndef __SOC_ROCKCHIP_OPP_SELECT_H
7 #define __SOC_ROCKCHIP_OPP_SELECT_H
8
9 #define VOLT_RM_TABLE_END ~1
10
11 /*
12 * [0]: set intermediate rate
13 * [1]: scaling up rate or scaling down rate
14 * [1]: add length for pvtpll
15 * [2:5]: length
16 * [2]: use low length for pvtpll
17 * [3:5]: reserved
18 */
19 #define OPP_RATE_MASK 0x3f
20
21 /* Set intermediate rate */
22 #define OPP_INTERMEDIATE_RATE BIT(0)
23 #define OPP_SCALING_UP_RATE BIT(1)
24 #define OPP_SCALING_UP_INTER (OPP_INTERMEDIATE_RATE | OPP_SCALING_UP_RATE)
25 #define OPP_SCALING_DOWN_INTER OPP_INTERMEDIATE_RATE
26
27 /* Add length for pvtpll */
28 #define OPP_ADD_LENGTH BIT(1)
29 #define OPP_LENGTH_MASK 0xf
30 #define OPP_LENGTH_SHIFT 2
31
32 /* Use low length for pvtpll */
33 #define OPP_LENGTH_LOW BIT(2)
34
35 struct rockchip_opp_info;
36
37 struct volt_rm_table {
38 int volt;
39 int rm;
40 };
41
42 struct rockchip_opp_data {
43 int (*get_soc_info)(struct device *dev, struct device_node *np,
44 int *bin, int *process);
45 int (*set_soc_info)(struct device *dev, struct device_node *np,
46 int bin, int process, int volt_sel);
47 int (*set_read_margin)(struct device *dev,
48 struct rockchip_opp_info *opp_info,
49 u32 rm);
50 };
51
52 struct pvtpll_opp_table {
53 unsigned long rate;
54 unsigned long u_volt;
55 unsigned long u_volt_min;
56 unsigned long u_volt_max;
57 unsigned long u_volt_mem;
58 unsigned long u_volt_mem_min;
59 unsigned long u_volt_mem_max;
60 };
61
62 struct rockchip_opp_info {
63 struct device *dev;
64 struct pvtpll_opp_table *opp_table;
65 const struct rockchip_opp_data *data;
66 struct volt_rm_table *volt_rm_tbl;
67 struct regmap *grf;
68 struct regmap *dsu_grf;
69 struct clk_bulk_data *clks;
70 struct clk *scmi_clk;
71 /* The threshold frequency for set intermediate rate */
72 unsigned long intermediate_threshold_freq;
73 unsigned int pvtpll_avg_offset;
74 unsigned int pvtpll_min_rate;
75 unsigned int pvtpll_volt_step;
76 int num_clks;
77 /* The read margin for low voltage */
78 u32 low_rm;
79 u32 current_rm;
80 u32 target_rm;
81 };
82
83 #if IS_ENABLED(CONFIG_ROCKCHIP_OPP)
84 int rockchip_of_get_leakage(struct device *dev, char *lkg_name, int *leakage);
85 void rockchip_of_get_lkg_sel(struct device *dev, struct device_node *np,
86 char *lkg_name, int process,
87 int *volt_sel, int *scale_sel);
88 void rockchip_pvtpll_calibrate_opp(struct rockchip_opp_info *info);
89 void rockchip_pvtpll_add_length(struct rockchip_opp_info *info);
90 void rockchip_of_get_pvtm_sel(struct device *dev, struct device_node *np,
91 char *reg_name, int bin, int process,
92 int *volt_sel, int *scale_sel);
93 void rockchip_of_get_bin_sel(struct device *dev, struct device_node *np,
94 int bin, int *scale_sel);
95 void rockchip_of_get_bin_volt_sel(struct device *dev, struct device_node *np,
96 int bin, int *bin_volt_sel);
97 int rockchip_nvmem_cell_read_u8(struct device_node *np, const char *cell_id,
98 u8 *val);
99 int rockchip_nvmem_cell_read_u16(struct device_node *np, const char *cell_id,
100 u16 *val);
101 int rockchip_get_volt_rm_table(struct device *dev, struct device_node *np,
102 char *porp_name, struct volt_rm_table **table);
103 void rockchip_get_opp_data(const struct of_device_id *matches,
104 struct rockchip_opp_info *info);
105 int rockchip_get_soc_info(struct device *dev, struct device_node *np, int *bin,
106 int *process);
107 void rockchip_get_scale_volt_sel(struct device *dev, char *lkg_name,
108 char *reg_name, int bin, int process,
109 int *scale, int *volt_sel);
110 struct opp_table *rockchip_set_opp_prop_name(struct device *dev, int process,
111 int volt_sel);
112 struct opp_table *rockchip_set_opp_supported_hw(struct device *dev,
113 struct device_node *np,
114 int bin, int volt_sel);
115 int rockchip_adjust_power_scale(struct device *dev, int scale);
116 int rockchip_get_read_margin(struct device *dev,
117 struct rockchip_opp_info *opp_info,
118 unsigned long volt, u32 *target_rm);
119 int rockchip_set_read_margin(struct device *dev,
120 struct rockchip_opp_info *opp_info, u32 rm,
121 bool is_set_rm);
122 int rockchip_init_read_margin(struct device *dev,
123 struct rockchip_opp_info *opp_info,
124 char *reg_name);
125 int rockchip_set_intermediate_rate(struct device *dev,
126 struct rockchip_opp_info *opp_info,
127 struct clk *clk, unsigned long old_freq,
128 unsigned long new_freq, bool is_scaling_up,
129 bool is_set_clk);
130 int rockchip_init_opp_table(struct device *dev,
131 struct rockchip_opp_info *info,
132 char *lkg_name, char *reg_name);
133 #else
rockchip_of_get_leakage(struct device * dev,char * lkg_name,int * leakage)134 static inline int rockchip_of_get_leakage(struct device *dev, char *lkg_name,
135 int *leakage)
136 {
137 return -EOPNOTSUPP;
138 }
139
rockchip_of_get_lkg_sel(struct device * dev,struct device_node * np,char * lkg_name,int process,int * volt_sel,int * scale_sel)140 static inline void rockchip_of_get_lkg_sel(struct device *dev,
141 struct device_node *np,
142 char *lkg_name, int process,
143 int *volt_sel, int *scale_sel)
144 {
145 }
146
rockchip_pvtpll_calibrate_opp(struct rockchip_opp_info * info)147 static inline void rockchip_pvtpll_calibrate_opp(struct rockchip_opp_info *info)
148 {
149 }
150
rockchip_pvtpll_add_length(struct rockchip_opp_info * info)151 static inline void rockchip_pvtpll_add_length(struct rockchip_opp_info *info)
152 {
153 }
154
rockchip_of_get_pvtm_sel(struct device * dev,struct device_node * np,char * reg_name,int bin,int process,int * volt_sel,int * scale_sel)155 static inline void rockchip_of_get_pvtm_sel(struct device *dev,
156 struct device_node *np,
157 char *reg_name, int bin, int process,
158 int *volt_sel, int *scale_sel)
159 {
160 }
161
rockchip_of_get_bin_sel(struct device * dev,struct device_node * np,int bin,int * scale_sel)162 static inline void rockchip_of_get_bin_sel(struct device *dev,
163 struct device_node *np, int bin,
164 int *scale_sel)
165 {
166 }
167
rockchip_of_get_bin_volt_sel(struct device * dev,struct device_node * np,int bin,int * bin_volt_sel)168 static inline void rockchip_of_get_bin_volt_sel(struct device *dev,
169 struct device_node *np,
170 int bin, int *bin_volt_sel)
171 {
172 }
173
rockchip_nvmem_cell_read_u8(struct device_node * np,const char * cell_id,u8 * val)174 static inline int rockchip_nvmem_cell_read_u8(struct device_node *np,
175 const char *cell_id, u8 *val)
176 {
177 return -EOPNOTSUPP;
178 }
179
rockchip_nvmem_cell_read_u16(struct device_node * np,const char * cell_id,u16 * val)180 static inline int rockchip_nvmem_cell_read_u16(struct device_node *np,
181 const char *cell_id, u16 *val)
182 {
183 return -EOPNOTSUPP;
184 }
185
rockchip_get_volt_rm_table(struct device * dev,struct device_node * np,char * porp_name,struct volt_rm_table ** table)186 static inline int rockchip_get_volt_rm_table(struct device *dev,
187 struct device_node *np,
188 char *porp_name,
189 struct volt_rm_table **table)
190 {
191 return -EOPNOTSUPP;
192
193 }
194
rockchip_get_opp_data(const struct of_device_id * matches,struct rockchip_opp_info * info)195 static inline void rockchip_get_opp_data(const struct of_device_id *matches,
196 struct rockchip_opp_info *info)
197 {
198 }
rockchip_get_soc_info(struct device * dev,struct device_node * np,int * bin,int * process)199 static inline int rockchip_get_soc_info(struct device *dev,
200 struct device_node *np, int *bin,
201 int *process)
202 {
203 return -EOPNOTSUPP;
204 }
205
rockchip_get_scale_volt_sel(struct device * dev,char * lkg_name,char * reg_name,int bin,int process,int * scale,int * volt_sel)206 static inline void rockchip_get_scale_volt_sel(struct device *dev,
207 char *lkg_name, char *reg_name,
208 int bin, int process, int *scale,
209 int *volt_sel)
210 {
211 }
212
rockchip_set_opp_prop_name(struct device * dev,int process,int volt_sel)213 static inline struct opp_table *rockchip_set_opp_prop_name(struct device *dev,
214 int process,
215 int volt_sel)
216 {
217 return ERR_PTR(-EOPNOTSUPP);
218 }
219
rockchip_set_opp_supported_hw(struct device * dev,struct device_node * np,int bin,int volt_sel)220 static inline struct opp_table *rockchip_set_opp_supported_hw(struct device *dev,
221 struct device_node *np,
222 int bin, int volt_sel)
223 {
224 return ERR_PTR(-EOPNOTSUPP);
225 }
226
rockchip_adjust_power_scale(struct device * dev,int scale)227 static inline int rockchip_adjust_power_scale(struct device *dev, int scale)
228 {
229 return -EOPNOTSUPP;
230 }
231
rockchip_get_read_margin(struct device * dev,struct rockchip_opp_info * opp_info,unsigned long volt,u32 * target_rm)232 static inline int rockchip_get_read_margin(struct device *dev,
233 struct rockchip_opp_info *opp_info,
234 unsigned long volt, u32 *target_rm)
235 {
236 return -EOPNOTSUPP;
237 }
rockchip_set_read_margin(struct device * dev,struct rockchip_opp_info * opp_info,u32 rm,bool is_set_rm)238 static inline int rockchip_set_read_margin(struct device *dev,
239 struct rockchip_opp_info *opp_info,
240 u32 rm, bool is_set_rm)
241 {
242 return -EOPNOTSUPP;
243 }
244
rockchip_init_read_margin(struct device * dev,struct rockchip_opp_info * opp_info,char * reg_name)245 static inline int rockchip_init_read_margin(struct device *dev,
246 struct rockchip_opp_info *opp_info,
247 char *reg_name)
248 {
249 return -EOPNOTSUPP;
250 }
251
252 static inline int
rockchip_set_intermediate_rate(struct device * dev,struct rockchip_opp_info * opp_info,struct clk * clk,unsigned long old_freq,unsigned long new_freq,bool is_scaling_up,bool is_set_clk)253 rockchip_set_intermediate_rate(struct device *dev,
254 struct rockchip_opp_info *opp_info,
255 struct clk *clk, unsigned long old_freq,
256 unsigned long new_freq, bool is_scaling_up,
257 bool is_set_clk)
258 {
259 return -EOPNOTSUPP;
260 }
261
rockchip_init_opp_table(struct device * dev,struct rockchip_opp_info * info,char * lkg_name,char * reg_name)262 static inline int rockchip_init_opp_table(struct device *dev,
263 struct rockchip_opp_info *info,
264 char *lkg_name, char *reg_name)
265 {
266 return -EOPNOTSUPP;
267 }
268
269 #endif /* CONFIG_ROCKCHIP_OPP */
270
271 #endif
272