1{ 2 { 3 { 4 .rank = 0x1, 5 .col = 0xA, 6 .bk = 0x2, 7 .bw = 0x1, 8 .dbw = 0x0, 9 .row_3_4 = 0x0, 10 .cs0_row = 0x11, 11 .cs1_row = 0x0, 12 .cs0_high16bit_row = 0x11, 13 .cs1_high16bit_row = 0x0, 14 .ddrconfig = 0 15 }, 16 { 17 {0x4d110a0a}, 18 {0x07020501}, 19 {0x00000002}, 20 {0x00001111}, 21 {0x0000000c}, 22 {0x00000232}, 23 0x000000ff 24 } 25 }, 26 { 27 .ddr_freq = 396, /* clock rate(MHz) */ 28 .dramtype = DDR4, 29 .num_channels = 1, 30 .stride = 0, 31 .odt = 0 32 }, 33 { 34 { 35 {0x00000000, 0x43049010}, /* MSTR */ 36 {0x00000064, 0x00300046}, /* RFSHTMG */ 37 {0x000000d0, 0x00020062}, /* INIT0 */ 38 {0x000000d4, 0x00280000}, /* INIT1 */ 39 {0x000000d8, 0x00000100}, /* INIT2 */ 40 {0x000000dc, 0x00040000}, /* INIT3 */ 41 {0x000000e0, 0x00000000}, /* INIT4 */ 42 {0x000000e4, 0x00110000}, /* INIT5 */ 43 {0x000000e8, 0x00000420}, /* INIT6 */ 44 {0x000000ec, 0x00000400}, /* INIT7 */ 45 {0x000000f4, 0x000f011f}, /* RANKCTL */ 46 {0x00000100, 0x09070d07}, /* DRAMTMG0 */ 47 {0x00000104, 0x0002020a}, /* DRAMTMG1 */ 48 {0x00000108, 0x0505040a}, /* DRAMTMG2 */ 49 {0x0000010c, 0x0040400c}, /* DRAMTMG3 */ 50 {0x00000110, 0x05030206}, /* DRAMTMG4 */ 51 {0x00000114, 0x03030202}, /* DRAMTMG5 */ 52 {0x00000120, 0x04040b04}, /* DRAMTMG8 */ 53 {0x00000124, 0x00020208}, /* DRAMTMG9 */ 54 {0x00000180, 0x01000040}, /* ZQCTL0 */ 55 {0x00000184, 0x00000000}, /* ZQCTL1 */ 56 {0x00000190, 0x07030003}, /* DFITMG0 */ 57 {0x00000198, 0x07000101}, /* DFILPCFG0 */ 58 {0x000001a0, 0xc0400003}, /* DFIUPD0 */ 59 {0x00000240, 0x06000604}, /* ODTCFG */ 60 {0x00000244, 0x00000201}, /* ODTMAP */ 61 {0x00000250, 0x00001f00}, /* SCHED */ 62 {0x00000490, 0x00000001}, /* PCTRL_0 */ 63 {0xffffffff, 0xffffffff} 64 } 65 }, 66 { 67 { 68 {0x00000004, 0x0000008c}, /* PHYREG01 */ 69 {0x00000014, 0x0000000a}, /* PHYREG05 */ 70 {0x00000018, 0x00000000}, /* PHYREG06 */ 71 {0x0000001c, 0x00000009}, /* PHYREG07 */ 72 {0xffffffff, 0xffffffff} 73 } 74 } 75}, 76