xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/rv1126-ai-cam.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
4 */
5
6#include <dt-bindings/display/drm_mipi_dsi.h>
7#include <dt-bindings/input/input.h>
8
9/ {
10	vcc5v0_sys: vccsys {
11		compatible = "regulator-fixed";
12		regulator-name = "vcc5v0_sys";
13		regulator-always-on;
14		regulator-boot-on;
15		regulator-min-microvolt = <5000000>;
16		regulator-max-microvolt = <5000000>;
17	};
18
19	vdd_arm: vdd-arm {
20		compatible = "pwm-regulator";
21		pwms = <&pwm0 0 5000 1>;
22		regulator-name = "vdd_arm";
23		regulator-min-microvolt = <725000>;
24		regulator-max-microvolt = <1000000>;
25		regulator-init-microvolt = <900000>;
26		regulator-always-on;
27		regulator-boot-on;
28		regulator-settling-time-up-us = <250>;
29		pwm-supply = <&vcc5v0_sys>;
30		status = "okay";
31	};
32
33	vdd_npu: vdd-npu {
34		compatible = "pwm-regulator";
35		pwms = <&pwm1 0 5000 1>;
36		regulator-name = "vdd_npu";
37		regulator-min-microvolt = <725000>;
38		regulator-max-microvolt = <875000>;
39		regulator-init-microvolt = <825000>;
40		regulator-always-on;
41		regulator-boot-on;
42		regulator-settling-time-up-us = <250>;
43		pwm-supply = <&vcc5v0_sys>;
44		status = "okay";
45	};
46
47	vdd_logic: vdd-logic {
48		compatible = "pwm-regulator";
49		pwms = <&pwm2 0 5000 1>;
50		regulator-name = "vdd_logic";
51		regulator-min-microvolt = <725000>;
52		regulator-max-microvolt = <875000>;
53		regulator-init-microvolt = <825000>;
54		regulator-always-on;
55		regulator-boot-on;
56		regulator-settling-time-up-us = <250>;
57		pwm-supply = <&vcc5v0_sys>;
58		status = "disabled";
59	};
60
61	vdd_fixed: vdd-fixed {
62		compatible = "regulator-fixed";
63		regulator-name = "vdd_fixed";
64		regulator-always-on;
65		regulator-boot-on;
66		regulator-min-microvolt = <825000>;
67		regulator-max-microvolt = <825000>;
68	};
69
70	vcc_3v3: vcc-3v3 {
71		compatible = "regulator-fixed";
72		regulator-name = "vcc_3v3";
73		regulator-always-on;
74		regulator-boot-on;
75		regulator-min-microvolt = <3300000>;
76		regulator-max-microvolt = <3300000>;
77	};
78
79	vcc_1v8: vcc-1v8 {
80		compatible = "regulator-fixed";
81		regulator-name = "vcc_1v8";
82		regulator-always-on;
83		regulator-boot-on;
84		regulator-min-microvolt = <1800000>;
85		regulator-max-microvolt = <1800000>;
86	};
87};
88
89&cpu0 {
90	cpu-supply = <&vdd_arm>;
91};
92
93&cpu_tsadc {
94	rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
95	rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
96	pinctrl-names = "gpio", "otpout";
97	pinctrl-0 = <&tsadcm0_shut>;
98	pinctrl-1 = <&tsadc_shutorg>;
99	status = "okay";
100};
101
102&cru {
103	assigned-clocks =
104		<&pmucru CLK_RTC32K>, <&pmucru PLL_GPLL>,
105		<&pmucru PCLK_PDPMU>, <&cru PLL_CPLL>,
106		<&cru PLL_HPLL>, <&cru ARMCLK>,
107		<&cru ACLK_PDBUS>, <&cru HCLK_PDBUS>,
108		<&cru PCLK_PDBUS>, <&cru ACLK_PDPHP>,
109		<&cru HCLK_PDPHP>, <&cru HCLK_PDAUDIO>,
110		<&cru HCLK_PDCORE_NIU>;
111	assigned-clock-rates =
112		<32768>, <1188000000>,
113		<100000000>, <491520000>,
114		<1400000000>, <600000000>,
115		<500000000>, <200000000>,
116		<100000000>, <300000000>,
117		<200000000>, <150000000>,
118		<200000000>;
119};
120
121&csi_dphy0 {
122	status = "okay";
123
124	ports {
125		#address-cells = <1>;
126		#size-cells = <0>;
127
128		port@1 {
129			reg = <1>;
130			#address-cells = <1>;
131			#size-cells = <0>;
132
133			csidphy0_out: endpoint@0 {
134				reg = <0>;
135				remote-endpoint = <&mipi_csi2_input>;
136				data-lanes = <1 2>;
137			};
138		};
139	};
140};
141
142&display_subsystem {
143	status = "okay";
144};
145
146&emmc {
147	bus-width = <8>;
148	cap-mmc-highspeed;
149	non-removable;
150	mmc-hs200-1_8v;
151	rockchip,default-sample-phase = <90>;
152	no-sdio;
153	no-sd;
154	/delete-property/ pinctrl-names;
155	/delete-property/ pinctrl-0;
156	status = "okay";
157};
158
159&fiq_debugger {
160	status = "okay";
161};
162
163&mipi_csi2 {
164	status = "okay";
165
166	ports {
167		#address-cells = <1>;
168		#size-cells = <0>;
169
170		port@0 {
171			reg = <0>;
172			#address-cells = <1>;
173			#size-cells = <0>;
174
175			mipi_csi2_input: endpoint@1 {
176				reg = <1>;
177				remote-endpoint = <&csidphy0_out>;
178				data-lanes = <1 2>;
179			};
180		};
181
182		port@1 {
183			reg = <1>;
184			#address-cells = <1>;
185			#size-cells = <0>;
186
187			mipi_csi2_output: endpoint@0 {
188				reg = <0>;
189				remote-endpoint = <&cif_mipi_in>;
190				data-lanes = <1 2>;
191			};
192		};
193	};
194};
195
196&mpp_srv {
197	status = "okay";
198};
199
200&nandc {
201	/delete-property/ pinctrl-names;
202	/delete-property/ pinctrl-0;
203	#address-cells = <1>;
204	#size-cells = <0>;
205
206	nand@0 {
207		reg = <0>;
208		nand-bus-width = <8>;
209		nand-ecc-mode = "hw";
210		nand-ecc-strength = <16>;
211		nand-ecc-step-size = <1024>;
212	};
213};
214
215&npu {
216	npu-supply = <&vdd_fixed>;
217	status = "okay";
218};
219
220&npu_tsadc {
221	rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
222	rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
223	pinctrl-names = "gpio", "otpout";
224	pinctrl-0 = <&tsadcm0_shut>;
225	pinctrl-1 = <&tsadc_shutorg>;
226	status = "okay";
227};
228
229&optee {
230	status = "disabled";
231};
232
233&otp {
234	status = "okay";
235};
236
237&pinctrl {
238	pmic {
239		/omit-if-no-ref/
240		pmic_int: pmic_int {
241			rockchip,pins =
242				<0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
243		};
244
245		/omit-if-no-ref/
246		soc_slppin_gpio: soc_slppin_gpio {
247			rockchip,pins =
248				<0 RK_PB2 RK_FUNC_GPIO &pcfg_output_low>;
249		};
250
251		/omit-if-no-ref/
252		soc_slppin_slp: soc_slppin_slp {
253			rockchip,pins =
254				<0 RK_PB2 1 &pcfg_pull_none>;
255		};
256
257		/omit-if-no-ref/
258		soc_slppin_rst: soc_slppin_rst {
259			rockchip,pins =
260				<0 RK_PB2 2 &pcfg_pull_none>;
261		};
262	};
263};
264
265&pmu_io_domains {
266	status = "okay";
267
268	pmuio0-supply = <&vcc_3v3>;
269	pmuio1-supply = <&vcc_3v3>;
270	vccio2-supply = <&vcc_3v3>;
271	vccio3-supply = <&vcc_1v8>;
272	vccio4-supply = <&vcc_1v8>;
273	vccio5-supply = <&vcc_3v3>;
274	vccio6-supply = <&vcc_1v8>;
275	vccio7-supply = <&vcc_1v8>;
276};
277
278&pwm0 {
279	status = "okay";
280	pinctrl-names = "active";
281	pinctrl-0 = <&pwm0m0_pins_pull_down>;
282};
283
284&pwm1 {
285	status = "okay";
286	pinctrl-names = "active";
287	pinctrl-0 = <&pwm1m0_pins_pull_down>;
288};
289
290&pwm2 {
291	status = "disabled";
292	pinctrl-names = "active";
293	pinctrl-0 = <&pwm2m0_pins_pull_down>;
294};
295
296&ramoops {
297	status = "okay";
298};
299
300&rk_rga {
301	status = "okay";
302};
303
304&rkcif {
305	status = "okay";
306};
307
308&rkcif_mipi_lvds {
309	status = "okay";
310
311	port {
312		/* MIPI CSI-2 endpoint */
313		cif_mipi_in: endpoint {
314			remote-endpoint = <&mipi_csi2_output>;
315			data-lanes = <1 2>;
316		};
317	};
318};
319
320&rkcif_mipi_lvds_sditf {
321	status = "okay";
322
323	port {
324		cif_sditf: endpoint {
325			remote-endpoint = <&isp_virt1_in>;
326			data-lanes = <1 2>;
327		};
328	};
329};
330
331&rkcif_mmu {
332	status = "disabled";
333};
334
335&rkisp {
336	status = "okay";
337};
338
339&rkisp_mmu {
340	status = "disabled";
341};
342
343&rkisp_vir0 {
344	status = "okay";
345	ports {
346		port@0 {
347			reg = <0>;
348			#address-cells = <1>;
349			#size-cells = <0>;
350
351			isp_virt1_in: endpoint@0 {
352				reg = <0>;
353				remote-endpoint = <&cif_sditf>;
354			};
355		};
356	};
357};
358
359&rkispp {
360	rockchip,restart-monitor-en;
361	status = "okay";
362	/* the max input w h and fps of mulit sensor */
363	//max-input = <3840 2160 30>;
364};
365
366&rkispp_mmu {
367	status = "okay";
368};
369
370&rkispp_vir0 {
371	status = "okay";
372};
373
374&rkvdec {
375	status = "okay";
376};
377
378&rkvdec_mmu {
379	status = "okay";
380};
381
382&rkvenc {
383	venc-supply = <&vdd_fixed>;
384	status = "okay";
385};
386
387&rkvenc_mmu {
388	status = "okay";
389};
390
391&rng {
392	status = "okay";
393};
394
395&saradc {
396	status = "okay";
397	vref-supply = <&vcc_1v8>;
398};
399
400&sfc {
401	/delete-property/ pinctrl-names;
402	/delete-property/ pinctrl-0;
403	status = "disabled";
404};
405
406&u2phy0 {
407	status = "okay";
408	vup-gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_LOW>;
409	u2phy_otg: otg-port {
410		status = "okay";
411		rockchip,vbus-always-on;
412	};
413};
414
415&usbdrd {
416	status = "okay";
417};
418
419&usbdrd_dwc3 {
420	status = "okay";
421	snps,tx-fifo-resize;
422	dr_mode = "peripheral";
423};
424
425&vdpu {
426	status = "okay";
427};
428
429&vepu {
430	status = "okay";
431};
432
433&vpu_mmu {
434	status = "okay";
435};
436
437&vop {
438	status = "okay";
439};
440
441&vop_mmu {
442	status = "okay";
443};
444