1 /* 2 * Copyright 2015 Rockchip Electronics Co. LTD 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 #ifndef __RKV_ENC_DEF_H__ 17 #define __RKV_ENC_DEF_H__ 18 19 #define RKV_ENC_INT_ONE_FRAME_FINISH 0x00000001 20 #define RKV_ENC_INT_LINKTABLE_FINISH 0x00000002 21 #define RKV_ENC_INT_SAFE_CLEAR_FINISH 0x00000004 22 #define RKV_ENC_INT_ONE_SLICE_FINISH 0x00000008 23 #define RKV_ENC_INT_BIT_STREAM_OVERFLOW 0x00000010 24 #define RKV_ENC_INT_BUS_WRITE_FULL 0x00000020 25 #define RKV_ENC_INT_BUS_WRITE_ERROR 0x00000040 26 #define RKV_ENC_INT_BUS_READ_ERROR 0x00000080 27 #define RKV_ENC_INT_TIMEOUT_ERROR 0x00000100 28 29 #define RKVENC_CODING_TYPE_AUTO 0x0000 /* Let enc choose the right type */ 30 #define RKVENC_CODING_TYPE_IDR 0x0001 31 #define RKVENC_CODING_TYPE_I 0x0002 32 #define RKVENC_CODING_TYPE_P 0x0003 33 #define RKVENC_CODING_TYPE_BREF 0x0004 /* Non-disposable B-frame */ 34 #define RKVENC_CODING_TYPE_B 0x0005 35 #define RKVENC_CODING_TYPE_KEYFRAME 0x0006 /* IDR or I depending on b_open_gop option */ 36 37 #define RKVE_IOC_CUSTOM_BASE 0x1000 38 #define RKVE_IOC_SET_OSD_PLT (RKVE_IOC_CUSTOM_BASE + 1) 39 #define RKVE_IOC_SET_L2_REG (RKVE_IOC_CUSTOM_BASE + 2) 40 41 42 #define RKVE_CSP2_MASK 0x00ff /* */ 43 #define RKVE_CSP2_NONE 0x0000 /* Invalid mode */ 44 #define RKVE_CSP2_I420 0x0001 /* yuv 4:2:0 planar */ 45 #define RKVE_CSP2_YV12 0x0002 /* yvu 4:2:0 planar */ 46 #define RKVE_CSP2_NV12 0x0003 /* yuv 4:2:0, with one y plane and one packed u+v */ 47 #define RKVE_CSP2_I422 0x0004 /* yuv 4:2:2 planar */ 48 #define RKVE_CSP2_YV16 0x0005 /* yvu 4:2:2 planar */ 49 #define RKVE_CSP2_NV16 0x0006 /* yuv 4:2:2, with one y plane and one packed u+v */ 50 #define RKVE_CSP2_V210 0x0007 /* 10-bit yuv 4:2:2 packed in 32 */ 51 #define RKVE_CSP2_I444 0x0008 /* yuv 4:4:4 planar */ 52 #define RKVE_CSP2_YV24 0x0009 /* yvu 4:4:4 planar */ 53 #define RKVE_CSP2_BGR 0x000a /* packed bgr 24bits */ 54 #define RKVE_CSP2_BGRA 0x000b /* packed bgr 32bits */ 55 #define RKVE_CSP2_RGB 0x000c /* packed rgb 24bits */ 56 #define RKVE_CSP2_MAX 0x000d /* end of list */ 57 #define RKVE_CSP2_VFLIP 0x1000 /* the csp is vertically flipped */ 58 #define RKVE_CSP2_HIGH_DEPTH 0x2000 /* the csp has a depth of 16 bits per pixel component */ 59 60 #define RKVE_MB_RC_ONLY_QUALITY 0 61 #define RKVE_MB_RC_MORE_QUALITY 1 62 #define RKVE_MB_RC_BALANCE 2 63 #define RKVE_MB_RC_MORE_BITRATE 3 64 #define RKVE_MB_RC_ONLY_BITRATE 4 65 #define RKVE_MB_RC_WIDE_RANGE 5 66 #define RKVE_MB_RC_ONLY_AQ 6 67 #define RKVE_MB_RC_M_NUM 7 68 69 typedef enum RkveCsp_e { 70 RKVE_CSP_BGRA8888, // 0 71 RKVE_CSP_BGR888, // 1 72 RKVE_CSP_BGR565, // 2 73 RKVE_CSP_NONE, // 3 74 RKVE_CSP_YUV422SP, // 4 75 RKVE_CSP_YUV422P, // 5 76 RKVE_CSP_YUV420SP, // 6 77 RKVE_CSP_YUV420P, // 7 78 RKVE_CSP_YUYV422, // 8 79 RKVE_CSP_UYVY422, // 9 80 RKVE_CSP_BUTT, // 10 81 } RkveCsp; 82 83 typedef enum enc_hal_rkv_buf_grp_t { 84 ENC_HAL_RKV_BUF_GRP_PP, 85 ENC_HAL_RKV_BUF_GRP_DSP, 86 ENC_HAL_RKV_BUF_GRP_MEI, 87 ENC_HAL_RKV_BUF_GRP_CMV, 88 ENC_HAL_RKV_BUF_GRP_ROI, 89 ENC_HAL_RKV_BUF_GRP_REC, 90 ENC_HAL_RKV_BUF_GRP_BUTT 91 } enc_hal_rkv_buf_grp; 92 93 typedef enum enc_rkv_lnktable_t { 94 RKVENC_LINKTABLE_DISABLE = 1, 95 RKVENC_LINKTABLE_START, 96 RKVENC_LINKTABLE_UPDATE 97 } enc_rkv_lnk_table; 98 99 typedef struct { 100 RK_U8 qp_y : 6; 101 RK_U8 set_qp_y_en : 1; 102 RK_U8 forbid_inter : 1; 103 } RkvRoiCfg; 104 105 typedef struct { 106 RK_U16 forbid_inter : 1; /* intra flag for cu 16x16 */ 107 RK_U16 reserved : 3; /* reserved */ 108 RK_U16 qp_area_idx : 3; /* roi range index */ 109 RK_U16 area_map : 1; /* roi en */ 110 RK_S16 qp_y : 7; /* qp_value, absolute qp or relative qp*/ 111 RK_U16 set_qp_y : 1; 112 } RkvRoiCfg_v2; 113 114 typedef enum ReOsdPltType_e { 115 RKVE_OSD_PLT_TYPE_NONE = -1, 116 RKVE_OSD_PLT_TYPE_USERDEF = 0, 117 RKVE_OSD_PLT_TYPE_DEFAULT = 1, 118 } RkveOsdPltType; 119 120 121 #define RKV_ENC_MODE RKVENC_LINKTABLE_DISABLE //2 122 #define RKVE_LINKTABLE_FRAME_NUM 1 //2 123 124 #if RKVE_ENC_MODE == RKVENC_LINKTABLE_START 125 #define RKVE_LINKTABLE_EACH_NUM RKVE_LINKTABLE_FRAME_NUM 126 #else 127 #define RKVE_LINKTABLE_EACH_NUM 1 128 #endif 129 #define RKVE_LINKTABLE_MAX_SIZE 256 130 131 #define RKVE_RC_TEXTURE_THR_SIZE 16 132 133 #endif 134