1 /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ 2 /* 3 * Copyright (c) 2023 Rockchip Electronics Co., Ltd. 4 */ 5 6 #ifndef RKPM_URAT_H 7 #define RKPM_URAT_H 8 9 #include "rkpm_helpers.h" 10 11 /* UART16550 Registers */ 12 #define UARTTX 0x0 13 #define UARTRX 0x0 14 #define UARTDLL 0x0 15 #define UARTIER 0x4 16 #define UARTDLLM 0x4 17 #define UARTIIR 0x8 18 #define UARTFCR 0x8 19 #define UARTLCR 0xc 20 #define UARTMCR 0x10 21 #define UARTLSR 0x14 22 #define UARTMSR 0x18 23 #define UARTSPR 0x1c 24 #define UARTCSR 0x20 25 26 #define UARTUSR 0x7c 27 #define UARTSRR 0x88 28 #define DIAGNOSTIC_MODE BIT(4) 29 #define UART_RESET BIT(0) 30 #define RCVR_FIFO_RESET BIT(1) 31 #define XMIT_FIFO_RESET BIT(2) 32 33 /* UART_USR bits */ 34 #define UARTUSR_BUSY BIT(0) 35 #define UARTUSR_TFIFO_N_FULL BIT(1) 36 #define UARTUSR_TFIFO_EMPTY BIT(2) 37 #define UARTUSR_RRIFO_N_EMPTY BIT(3) 38 #define UARTUSR_RFIFO_FULL BIT(4) 39 40 #define UARTFCR_FIFOEN (1 << 0) /* Enable the Tx/Rx FIFO */ 41 42 #define UARTLCR_DLAB (1 << 7) /* Divisor Latch Access */ 43 44 struct uart_debug_ctx { 45 u32 uart_dll; 46 u32 uart_dlh; 47 u32 uart_ier; 48 u32 uart_fcr; 49 u32 uart_mcr; 50 u32 uart_lcr; 51 }; 52 53 void rkpm_uart_debug_init(void __iomem *base, 54 unsigned int uart_clk, 55 unsigned int baud_rate); 56 void rkpm_uart_debug_save(void __iomem *base, 57 struct uart_debug_ctx *ctx); 58 void rkpm_uart_debug_restore(void __iomem *base, 59 struct uart_debug_ctx *ctx); 60 #endif 61