1 /* SPDX-License-Identifier: GPL-2.0 */
2
3 /* Copyright (c) 2018 Rockchip Electronics Co. Ltd. */
4
5 #ifndef __RK_CRYPTO_V2_H__
6 #define __RK_CRYPTO_V2_H__
7
8 #include <linux/platform_device.h>
9
10 #include "rk_crypto_utils.h"
11
12 struct rk_hw_crypto_v2_info {
13 struct rk_hw_desc hw_desc;
14 };
15
16 #define RK_CRYPTO_V2_SOC_DATA_INIT(names, soft_aes_192) {\
17 .crypto_ver = "CRYPTO V2.0.0.0",\
18 .use_soft_aes192 = soft_aes_192,\
19 .valid_algs_name = (names),\
20 .valid_algs_num = ARRAY_SIZE(names),\
21 .hw_init = rk_hw_crypto_v2_init,\
22 .hw_deinit = rk_hw_crypto_v2_deinit,\
23 .hw_get_rsts = rk_hw_crypto_v2_get_rsts,\
24 .hw_get_algts = rk_hw_crypto_v2_get_algts,\
25 .hw_is_algo_valid = rk_hw_crypto_v2_algo_valid,\
26 .hw_info_size = sizeof(struct rk_hw_crypto_v2_info),\
27 .default_pka_offset = 0x0480,\
28 .use_lli_chain = true,\
29 }
30
31 #if IS_ENABLED(CONFIG_CRYPTO_DEV_ROCKCHIP_V2)
32
33 extern struct rk_crypto_algt rk_v2_ecb_sm4_alg;
34 extern struct rk_crypto_algt rk_v2_cbc_sm4_alg;
35 extern struct rk_crypto_algt rk_v2_xts_sm4_alg;
36 extern struct rk_crypto_algt rk_v2_cfb_sm4_alg;
37 extern struct rk_crypto_algt rk_v2_ofb_sm4_alg;
38 extern struct rk_crypto_algt rk_v2_ctr_sm4_alg;
39 extern struct rk_crypto_algt rk_v2_gcm_sm4_alg;
40
41 extern struct rk_crypto_algt rk_v2_ecb_aes_alg;
42 extern struct rk_crypto_algt rk_v2_cbc_aes_alg;
43 extern struct rk_crypto_algt rk_v2_xts_aes_alg;
44 extern struct rk_crypto_algt rk_v2_cfb_aes_alg;
45 extern struct rk_crypto_algt rk_v2_ofb_aes_alg;
46 extern struct rk_crypto_algt rk_v2_ctr_aes_alg;
47 extern struct rk_crypto_algt rk_v2_gcm_aes_alg;
48
49 extern struct rk_crypto_algt rk_v2_ecb_des_alg;
50 extern struct rk_crypto_algt rk_v2_cbc_des_alg;
51 extern struct rk_crypto_algt rk_v2_cfb_des_alg;
52 extern struct rk_crypto_algt rk_v2_ofb_des_alg;
53
54 extern struct rk_crypto_algt rk_v2_ecb_des3_ede_alg;
55 extern struct rk_crypto_algt rk_v2_cbc_des3_ede_alg;
56 extern struct rk_crypto_algt rk_v2_cfb_des3_ede_alg;
57 extern struct rk_crypto_algt rk_v2_ofb_des3_ede_alg;
58
59 extern struct rk_crypto_algt rk_v2_ahash_sha1;
60 extern struct rk_crypto_algt rk_v2_ahash_sha224;
61 extern struct rk_crypto_algt rk_v2_ahash_sha256;
62 extern struct rk_crypto_algt rk_v2_ahash_sha384;
63 extern struct rk_crypto_algt rk_v2_ahash_sha512;
64 extern struct rk_crypto_algt rk_v2_ahash_md5;
65 extern struct rk_crypto_algt rk_v2_ahash_sm3;
66
67 extern struct rk_crypto_algt rk_v2_hmac_md5;
68 extern struct rk_crypto_algt rk_v2_hmac_sha1;
69 extern struct rk_crypto_algt rk_v2_hmac_sha256;
70 extern struct rk_crypto_algt rk_v2_hmac_sha512;
71 extern struct rk_crypto_algt rk_v2_hmac_sm3;
72
73 extern struct rk_crypto_algt rk_v2_asym_rsa;
74
75 int rk_hw_crypto_v2_init(struct device *dev, void *hw_info);
76 void rk_hw_crypto_v2_deinit(struct device *dev, void *hw_info);
77 const char * const *rk_hw_crypto_v2_get_rsts(uint32_t *num);
78 struct rk_crypto_algt **rk_hw_crypto_v2_get_algts(uint32_t *num);
79 bool rk_hw_crypto_v2_algo_valid(struct rk_crypto_dev *rk_dev, struct rk_crypto_algt *aglt);
80
81 #else
82
rk_hw_crypto_v2_init(struct device * dev,void * hw_info)83 static inline int rk_hw_crypto_v2_init(struct device *dev, void *hw_info) { return -EINVAL; }
rk_hw_crypto_v2_deinit(struct device * dev,void * hw_info)84 static inline void rk_hw_crypto_v2_deinit(struct device *dev, void *hw_info) {}
rk_hw_crypto_v2_get_rsts(uint32_t * num)85 static inline const char * const *rk_hw_crypto_v2_get_rsts(uint32_t *num) { return NULL; }
rk_hw_crypto_v2_get_algts(uint32_t * num)86 static inline struct rk_crypto_algt **rk_hw_crypto_v2_get_algts(uint32_t *num) { return NULL; }
rk_hw_crypto_v2_algo_valid(struct rk_crypto_dev * rk_dev,struct rk_crypto_algt * aglt)87 static inline bool rk_hw_crypto_v2_algo_valid(struct rk_crypto_dev *rk_dev,
88 struct rk_crypto_algt *aglt)
89 {
90 return false;
91 }
92
93 #endif /* end of IS_ENABLED(CONFIG_CRYPTO_DEV_ROCKCHIP_V2) */
94
95 #endif /* end of __RK_CRYPTO_V2_H__ */
96