xref: /OK3568_Linux_fs/kernel/drivers/misc/rk628/rk628_grf.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (c) 2020 Rockchip Electronics Co. Ltd.
4  *
5  * Author: Wyon Bi <bivvy.bi@rock-chips.com>
6  */
7 
8 #ifndef RK628_GRF_H
9 #define RK628_GRF_H
10 
11 #define GPIO_FUNC 0
12 #define MUX_FUNC1 1
13 #define MUX_FUNC2 2
14 #define MUX_FUNC3 3
15 
16 /* GRF_SYSTEM_CON3 */
17 #define UART_CTS_DISABLE 0xB0
18 #define UART_CTS_ENABLE 0xB1
19 
20 #define UART_RTS_DISABLE 0xA0
21 #define UART_RTS_ENABLE 0xA1
22 
23 #define UART_IOMUX_DISABLE 0x90
24 #define UART_IOMUX_ENABLE 0x91
25 
26 #define JTAG_DISABLE 0x80
27 #define JTAG_ENABLE 0x81
28 
29 #define HDMIRX_CEC0 0x70
30 #define HDMIRX_CEC1 0x71
31 
32 #define SELECT_RXDDC_SDA0 0x60
33 #define SELECT_RXDDC_SDA1 0x61
34 
35 #define SELECT_RXDDC_SCL0 0x50
36 #define SELECT_RXDDC_SCL1 0x51
37 
38 #define SELECT_I2S_LRM0 0x40
39 #define SELECT_I2S_LRM1 0x41
40 
41 #define SELECT_I2S_DM0 0x30
42 #define SELECT_I2S_DM1 0x31
43 
44 #define SELECT_I2S_SCKM0 0x20
45 #define SELECT_I2S_SCKM1 0x21
46 
47 /* GPIO0_A */
48 #define GPIO_0A2 0x0a20
49 #define I2S_SCKM0 0x0a21
50 
51 #define GPIO0A3 0x0a30
52 #define I2SLR_M0 0x0a31
53 
54 #define GPIO0A4 0x0a40
55 #define I2SM0D0 0x0a41
56 #define UART_TXM1 0x0a42
57 
58 #define GPIO0A5 0x0a50
59 #define I2SM0D1 0x0a51
60 #define UART_RXM1 0x0a52
61 
62 #define GPIO0A6 0x0a60
63 #define I2SM0D2 0x0a61
64 #define UART_CTSNM1 0x0a62
65 
66 #define GPIO0A7 0x0a70
67 #define I2SM0D3 0x0a71
68 #define UART_RTSNM1 0x0a72
69 
70 
71 /* GPIO0_B */
72 #define GPIO0B0 0x0b00
73 #define HPDIN 0x0b01
74 
75 #define GPIO0B1 0x0b10
76 #define DDCSDATX 0x0b11
77 
78 #define GPIO0B2 0x0b20
79 #define DDCSCLTX 0x0b21
80 
81 #define GPIO0B3 0x0b30
82 #define CECTX 0x0b31
83 
84 
85 /* GPIO1_A */
86 #define GPIO1A0 0x1a00
87 #define TESTCLKOUT 0x1a01
88 
89 #define GPIO1A1 0x1a10
90 #define XIPSFC_SCLK 0x1a11
91 
92 #define GPIO1A2 0x1a20
93 #define I2SSCKM1 0x1a21
94 
95 #define GPIO1A3 0x1a30
96 #define I2SM1LR 0x1a31
97 
98 #define GPIO1A4 0x1a40
99 #define I2SM1D0 0x1a41
100 
101 #define GPIO1A5 0x1a50
102 #define I2SM1D1 0x1a51
103 
104 #define GPIO1A6 0x1a60
105 #define I2SM1D2 0x1a61
106 
107 #define GPIO1A7 0x1a70
108 #define I2SM1D3 0x1a71
109 
110 
111 /* GPIO1_B */
112 #define GPIO1B0 0x1b00
113 #define HPDM0OUT 0x1b01
114 
115 #define GPIO1B1 0x1b10
116 #define DDCM0SDARX 0x1b11
117 
118 #define GPIO1B2 0x1b20
119 #define DDCM0SCLRX 0x1b21
120 
121 #define GPIO1B3 0x1b30
122 #define CECM0RX 0x1b31
123 
124 #define GPIO1B4 0x1b40
125 #define I2CS_SCL 0x1b41
126 #define I2CM_SCL 0x1b42
127 
128 #define GPIO1B5 0x1b50
129 #define I2CS_SDA 0x1b51
130 #define I2CM_SDA 0x1b52
131 
132 
133 /* GPIO2_A */
134 #define GPIO2A0 0x2a00
135 #define VOPD0 0x2a01
136 
137 #define GPIO2A1 0x2a10
138 #define VOPD1 0x2a11
139 
140 #define GPIO2A2 0x2a20
141 #define VOPD2 0x2a21
142 
143 #define GPIO2A3 0x2a30
144 #define VOPD3 0x2a31
145 
146 #define GPIO2A4 0x2a40
147 #define VOPD4 0x2a41
148 
149 #define GPIO2A5 0x2a50
150 #define VOPD5 0x2a51
151 
152 #define GPIO2A6 0x2a60
153 #define VOPD6 0x2a61
154 
155 #define GPIO2A7 0x2a70
156 #define VOPD7 0x2a71
157 
158 
159 /* GPIO2_B */
160 #define GPIO2B0 0x2b00
161 #define VOPD8 0x2b01
162 
163 #define GPIO2B1 0x2b10
164 #define VOPD9 0x2b11
165 
166 #define GPIO2B2 0x2b20
167 #define VOPD10 0x2b21
168 
169 #define GPIO2B3 0x2b30
170 #define VOPD11 0x2b31
171 
172 #define GPIO2B4 0x2b40
173 #define VOPD12 0x2b41
174 
175 #define GPIO2B5 0x2b50
176 #define VOPD13 0x2b51
177 
178 #define GPIO2B6 0x2b60
179 #define VOPD14 0x2b61
180 
181 #define GPIO2B7 0x2b70
182 #define VOPD15 0x2b71
183 
184 
185 /* GPIO2_C */
186 #define GPIO2C0 0x2c00
187 #define VOPD16 0x2c01
188 #define XIPSFC_CSN 0x2c02
189 
190 #define GPIO2C1 0x2c10
191 #define VOPD17 0x2c11
192 #define XIPSFC_MISO 0x2c12
193 
194 #define GPIO2C2 0x2c20
195 #define VOPD18 0x2c21
196 #define XIPSFC_MOSI 0x2c22
197 
198 #define GPIO2C3 0x2c30
199 #define VOPD19 0x2c31
200 #define RISVJTAG_TDO 0x2c32
201 #define UART_TXM0 0x2c33
202 
203 #define GPIO2C4 0x2c40
204 #define VOPD20 0x2c41
205 #define RISVJTAG_TDI 0x2c42
206 #define UART_RXM0 0x2c43
207 
208 #define GPIO2C5 0x2c50
209 #define VOPD21 0x2c51
210 #define RISVJTAG_TMS 0x2c52
211 #define UART_CTSNM0 0x2c53
212 
213 #define GPIO2C6 0x2c60
214 #define VOPD22 0x2c61
215 #define RISVJTAG_TCK 0x2c62
216 #define UART_RTSNM0 0x2c63
217 
218 #define GPIO2C7 0x2c70
219 #define VOPD23 0x2c71
220 #define RISVJTAG_TRSTN 0x2c72
221 
222 
223 /* GPIO3_A */
224 #define GPIO3A0 0x3a00
225 #define VOPDEN 0x3a01
226 
227 #define GPIO3A1 0x3a10
228 #define VOPHSYNC 0x3a11
229 
230 #define GPIO3A3 0x3a30
231 #define VOPVSYNC 0x3a31
232 
233 #define GPIO3A4 0x3a40
234 #define HPDM1OUT 0x3a41
235 
236 #define GPIO3A5 0x3a50
237 #define DDCM1SDARX 0x3a51
238 
239 #define GPIO3A6 0x3a60
240 #define DDCM1SCLRX 0x3a61
241 
242 #define GPIO3A7 0x3a70
243 #define CECM1RX 0x3a71
244 
245 
246 /* GPIO3_B */
247 #define GPIO3B0 0x3b00
248 #define VOPDCLK 0x3b01
249 
250 #define GPIO3B1 0x3b10
251 #define GVIHPD 0x3b11
252 
253 #define GPIO3B2 0x3b20
254 #define GVILOCK 0x3b21
255 
256 #define GPIO3B4 0x3b40
257 #define SPIBOOT 0x3b41
258 #define INT 0x3b42
259 
260 
261 #endif // RK628_GRF_H
262 
263 
264