1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7/ { 8 aliases { 9 mmc0 = &sdhci; 10 mmc1 = &sdmmc; 11 mmc2 = &sdio; 12 }; 13 14 chosen: chosen { 15 bootargs = "earlycon=uart8250,mmio32,0xfeb50000 console=ttyFIQ0 irqchip.gicv3_pseudo_nmi=0 root=PARTUUID=614e0000-0000 rw rootwait"; 16 }; 17 18 cspmu: cspmu@fd10c000 { 19 compatible = "rockchip,cspmu"; 20 reg = <0x0 0xfd10c000 0x0 0x1000>, 21 <0x0 0xfd10d000 0x0 0x1000>, 22 <0x0 0xfd10e000 0x0 0x1000>, 23 <0x0 0xfd10f000 0x0 0x1000>, 24 <0x0 0xfd12c000 0x0 0x1000>, 25 <0x0 0xfd12d000 0x0 0x1000>, 26 <0x0 0xfd12e000 0x0 0x1000>, 27 <0x0 0xfd12f000 0x0 0x1000>; 28 }; 29 30 debug: debug@fd104000 { 31 compatible = "rockchip,debug"; 32 reg = <0x0 0xfd104000 0x0 0x1000>, 33 <0x0 0xfd105000 0x0 0x1000>, 34 <0x0 0xfd106000 0x0 0x1000>, 35 <0x0 0xfd107000 0x0 0x1000>, 36 <0x0 0xfd124000 0x0 0x1000>, 37 <0x0 0xfd125000 0x0 0x1000>, 38 <0x0 0xfd126000 0x0 0x1000>, 39 <0x0 0xfd127000 0x0 0x1000>; 40 }; 41 42 fiq_debugger: fiq-debugger { 43 compatible = "rockchip,fiq-debugger"; 44 rockchip,serial-id = <2>; 45 rockchip,wake-irq = <0>; 46 /* If enable uart uses irq instead of fiq */ 47 rockchip,irq-mode-enable = <1>; 48 rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */ 49 interrupts = <GIC_SPI 423 IRQ_TYPE_LEVEL_LOW>; 50 pinctrl-names = "default"; 51 pinctrl-0 = <&uart2m0_xfer>; 52 status = "okay"; 53 }; 54 55 firmware { 56 optee: optee { 57 compatible = "linaro,optee-tz"; 58 method = "smc"; 59 //status = "disabled"; 60 }; 61 }; 62 63 reserved-memory { 64 #address-cells = <2>; 65 #size-cells = <2>; 66 ranges; 67 68 cma { 69 compatible = "shared-dma-pool"; 70 reusable; 71 size = <0x0 (8 * 0x100000)>; 72 linux,cma-default; 73 }; 74 75 drm_logo: drm-logo@00000000 { 76 compatible = "rockchip,drm-logo"; 77 reg = <0x0 0x0 0x0 0x0>; 78 }; 79 80 drm_cubic_lut: drm-cubic-lut@00000000 { 81 compatible = "rockchip,drm-cubic-lut"; 82 reg = <0x0 0x0 0x0 0x0>; 83 }; 84 85 ramoops: ramoops@110000 { 86 compatible = "ramoops"; 87 reg = <0x0 0x110000 0x0 0xf0000>; 88 record-size = <0x20000>; 89 console-size = <0x80000>; 90 ftrace-size = <0x00000>; 91 pmsg-size = <0x50000>; 92 }; 93 }; 94}; 95 96&display_subsystem { 97 memory-region = <&drm_logo>; 98 memory-region-names = "drm-logo"; 99}; 100 101&dfi { 102 status = "okay"; 103}; 104 105&dmc { 106 status = "okay"; 107 center-supply = <&vdd_ddr_s0>; 108 mem-supply = <&vdd_log_s0>; 109}; 110 111&rng { 112 status = "okay"; 113}; 114