xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk3588-evb1-imx415.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
4 *
5 */
6
7/ {
8	cam_ircut0: cam_ircut {
9		status = "okay";
10		compatible = "rockchip,ircut";
11		ircut-open-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
12		ircut-close-gpios  = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
13		rockchip,camera-module-index = <0>;
14		rockchip,camera-module-facing = "back";
15	};
16};
17
18&csi2_dcphy0 {
19	status = "okay";
20
21	ports {
22		#address-cells = <1>;
23		#size-cells = <0>;
24		port@0 {
25			reg = <0>;
26			#address-cells = <1>;
27			#size-cells = <0>;
28
29			mipi_in_ucam0: endpoint@1 {
30				reg = <1>;
31				remote-endpoint = <&imx415_out0>;
32				data-lanes = <1 2 3 4>;
33			};
34		};
35		port@1 {
36			reg = <1>;
37			#address-cells = <1>;
38			#size-cells = <0>;
39
40			csidcphy0_out: endpoint@0 {
41				reg = <0>;
42				remote-endpoint = <&mipi0_csi2_input>;
43			};
44		};
45	};
46};
47
48&i2c5 {
49	status = "okay";
50
51	imx415: imx415@1a {
52		compatible = "sony,imx415";
53		reg = <0x1a>;
54		clocks = <&cru CLK_MIPI_CAMARAOUT_M1>;
55		clock-names = "xvclk";
56		pinctrl-names = "default";
57		pinctrl-0 = <&mipim0_camera1_clk>;
58		power-domains = <&power RK3588_PD_VI>;
59		pwdn-gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
60		avdd-supply = <&vcc_mipidcphy0>;
61		rockchip,camera-module-index = <0>;
62		rockchip,camera-module-facing = "back";
63		rockchip,camera-module-name = "CMK-OT2022-PX1";
64		rockchip,camera-module-lens-name = "IR0147-50IRC-8M-F20";
65		lens-focus = <&cam_ircut0>;
66		port {
67			imx415_out0: endpoint {
68				remote-endpoint = <&mipi_in_ucam0>;
69				data-lanes = <1 2 3 4>;
70			};
71		};
72	};
73};
74
75&mipi_dcphy0 {
76	status = "okay";
77};
78
79&mipi0_csi2 {
80	status = "okay";
81
82	ports {
83		#address-cells = <1>;
84		#size-cells = <0>;
85
86		port@0 {
87			reg = <0>;
88			#address-cells = <1>;
89			#size-cells = <0>;
90
91			mipi0_csi2_input: endpoint@1 {
92				reg = <1>;
93				remote-endpoint = <&csidcphy0_out>;
94			};
95		};
96
97		port@1 {
98			reg = <1>;
99			#address-cells = <1>;
100			#size-cells = <0>;
101
102			mipi0_csi2_output: endpoint@0 {
103				reg = <0>;
104				remote-endpoint = <&cif_mipi_in0>;
105			};
106		};
107	};
108};
109
110&rkcif {
111	status = "okay";
112};
113
114&rkcif_mipi_lvds {
115	status = "okay";
116
117	port {
118		cif_mipi_in0: endpoint {
119			remote-endpoint = <&mipi0_csi2_output>;
120		};
121	};
122};
123
124&rkcif_mipi_lvds_sditf {
125	status = "okay";
126
127	port {
128		mipi_lvds_sditf: endpoint {
129			remote-endpoint = <&isp0_vir0>;
130		};
131	};
132};
133
134&rkcif_mmu {
135	status = "okay";
136};
137
138&rkisp0 {
139	status = "okay";
140};
141
142&isp0_mmu {
143	status = "okay";
144};
145
146&rkisp0_vir0 {
147	status = "okay";
148
149	port {
150		#address-cells = <1>;
151		#size-cells = <0>;
152
153		isp0_vir0: endpoint@0 {
154			reg = <0>;
155			remote-endpoint = <&mipi_lvds_sditf>;
156		};
157	};
158};
159