xref: /rk3399_rockchip-uboot/arch/arm/dts/rk3576-u-boot.dtsi (revision b2ea6a555cb51034d7aac47c9606324d51e8cd5f) 
1/*
2 * (C) Copyright 2023 Rockchip Electronics Co., Ltd
3 *
4 * SPDX-License-Identifier:     GPL-2.0+
5 */
6
7#include <dt-bindings/gpio/gpio.h>
8
9/ {
10	aliases {
11		mmc0 = &sdhci;
12		mmc1 = &sdmmc;
13	};
14
15	chosen {
16		stdout-path = &uart0;
17		u-boot,spl-boot-order = &sdmmc, &spi_nand, &spi_nor, "same-as-spl";
18	};
19
20	secure-otp@2a480000 {
21		u-boot,dm-spl;
22		compatible = "rockchip,rk3576-secure-otp";
23		reg = <0x0 0x2a480000 0x0 0x10000>;
24	};
25};
26
27&firmware {
28	u-boot,dm-pre-reloc;
29};
30
31&gpio0 {
32	u-boot,dm-spl;
33	status = "okay";
34};
35
36&gpio1 {
37	u-boot,dm-pre-reloc;
38	status = "okay";
39};
40
41&gpio2 {
42	u-boot,dm-pre-reloc;
43	status = "okay";
44};
45
46&gpio3 {
47	u-boot,dm-pre-reloc;
48	status = "okay";
49};
50
51&gpio4 {
52	u-boot,dm-pre-reloc;
53	status = "okay";
54};
55
56&scmi {
57	u-boot,dm-pre-reloc;
58};
59
60&scmi_clk {
61	u-boot,dm-pre-reloc;
62};
63
64&scmi_shmem {
65	u-boot,dm-pre-reloc;
66};
67
68&sys_grf {
69	u-boot,dm-spl;
70	status = "okay";
71};
72
73&ioc_grf {
74	u-boot,dm-spl;
75	status = "okay";
76};
77
78&cru {
79	u-boot,dm-spl;
80	status = "okay";
81};
82
83&psci {
84	u-boot,dm-pre-reloc;
85	status = "okay";
86};
87
88&crypto {
89	u-boot,dm-spl;
90	status = "okay";
91};
92
93&uart0 {
94	u-boot,dm-spl;
95	status = "okay";
96};
97
98&hw_decompress {
99	u-boot,dm-spl;
100	status = "okay";
101};
102
103&rng {
104	u-boot,dm-pre-reloc;
105	status = "okay";
106};
107
108&sfc0 {
109	u-boot,dm-spl;
110	status = "okay";
111
112	#address-cells = <1>;
113	#size-cells = <0>;
114	spi_nand: flash@0 {
115		u-boot,dm-spl;
116		compatible = "spi-nand";
117		reg = <0>;
118		spi-tx-bus-width = <1>;
119		spi-rx-bus-width = <4>;
120		spi-max-frequency = <80000000>;
121	};
122
123	spi_nor: flash@1 {
124		u-boot,dm-spl;
125		compatible = "jedec,spi-nor";
126		label = "sfc_nor";
127		reg = <0>;
128		spi-tx-bus-width = <1>;
129		spi-rx-bus-width = <4>;
130		spi-max-frequency = <80000000>;
131	};
132};
133
134&saradc {
135	u-boot,dm-pre-reloc;
136	status = "okay";
137};
138
139&sdmmc {
140	bus-width = <4>;
141	u-boot,dm-spl;
142	status = "okay";
143};
144
145&sdhci {
146	bus-width = <8>;
147	u-boot,dm-spl;
148	mmc-hs400-1_8v;
149	mmc-hs400-enhanced-strobe;
150	non-removable;
151	status = "okay";
152};
153
154&sdmmc0 {
155	u-boot,dm-spl;
156};
157
158&sdmmc0_bus4 {
159	u-boot,dm-spl;
160};
161
162&sdmmc0_clk {
163	u-boot,dm-spl;
164};
165
166&sdmmc0_cmd {
167	u-boot,dm-spl;
168};
169
170&sdmmc0_det {
171	u-boot,dm-spl;
172};
173
174&sdmmc0_pwren {
175	u-boot,dm-spl;
176};
177
178&pinctrl {
179	u-boot,dm-spl;
180};
181
182&pcfg_pull_up_drv_level_2 {
183	u-boot,dm-spl;
184};
185
186&pcfg_pull_up {
187	u-boot,dm-spl;
188};
189
190&pcfg_pull_none
191{
192	u-boot,dm-spl;
193};
194
195&php_grf {
196	u-boot,dm-pre-reloc;
197	status = "okay";
198};
199
200&pipe_phy0_grf {
201	u-boot,dm-pre-reloc;
202	status = "okay";
203};
204
205&pipe_phy1_grf {
206	u-boot,dm-pre-reloc;
207	status = "okay";
208};
209
210&usbdpphy_grf {
211	u-boot,dm-pre-reloc;
212};
213
214&usbdp_phy {
215	u-boot,dm-pre-reloc;
216	status = "okay";
217};
218
219&usbdp_phy_u3 {
220	u-boot,dm-pre-reloc;
221	status = "okay";
222};
223
224&usb_grf {
225	u-boot,dm-pre-reloc;
226};
227
228&usb2phy_grf {
229	u-boot,dm-pre-reloc;
230};
231
232&u2phy0 {
233	u-boot,dm-pre-reloc;
234	status = "okay";
235};
236
237&u2phy0_otg {
238	u-boot,dm-pre-reloc;
239	status = "okay";
240};
241
242&ufs {
243	u-boot,dm-spl;
244	status = "okay";
245};
246