xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk3566-box-demo-v10.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
4 *
5 */
6
7/dts-v1/;
8
9#include "rk3566-box.dtsi"
10
11/ {
12	model = "Rockchip RK3566 BOX DEMO V10 Board";
13	compatible = "rockchip,rk3568-box-demo-v10", "rockchip,rk3566";
14
15	gpio-leds {
16		compatible = "gpio-leds";
17
18		ir-led {
19			gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
20			default-state = "off";
21		};
22
23		work-led {
24			gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
25			linux,default-trigger = "timer";
26		};
27	};
28
29	vcc2v5_sys: vcc2v5-ddr {
30		compatible = "regulator-fixed";
31		regulator-name = "vcc2v5-sys";
32		regulator-always-on;
33		regulator-boot-on;
34		regulator-min-microvolt = <2500000>;
35		regulator-max-microvolt = <2500000>;
36		vin-supply = <&vcc3v3_sys>;
37	};
38
39	sdio_pwrseq: sdio-pwrseq {
40		compatible = "mmc-pwrseq-simple";
41		clocks = <&pmucru CLK_RTC_32K>;
42		clock-names = "ext_clock";
43		pinctrl-names = "default";
44		pinctrl-0 = <&wifi_enable_h &wifi_32k>;
45		reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
46	};
47
48	vcc3v3_sd: vcc3v3-sd-regulator {
49		compatible = "regulator-gpio";
50		regulator-name = "vcc3v3_sd";
51		regulator-min-microvolt = <100000>;
52		regulator-max-microvolt = <3300000>;
53		gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
54		gpios-states = <0x1>;
55		states = <100000 0x1
56			  3300000 0x0>;
57	};
58
59	vccio_sd: vccio-sd-regulator {
60		compatible = "regulator-gpio";
61		regulator-name = "vccio_sd";
62		regulator-min-microvolt = <1800000>;
63		regulator-max-microvolt = <3300000>;
64		gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
65		gpios-states = <0x1>;
66		states = <1800000 0x0
67			  3300000 0x1>;
68	};
69
70	vcc5v0_host: vcc5v0-host-regulator {
71		compatible = "regulator-fixed";
72		enable-active-high;
73		gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
74		pinctrl-names = "default";
75		pinctrl-0 = <&vcc5v0_host_en>;
76		regulator-name = "vcc5v0_host";
77		regulator-always-on;
78	};
79
80	vcc5v0_otg: vcc5v0-otg-regulator {
81		compatible = "regulator-fixed";
82		enable-active-high;
83		gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
84		pinctrl-names = "default";
85		pinctrl-0 = <&vcc5v0_otg_en>;
86		regulator-name = "vcc5v0_otg";
87	};
88
89	vcc_camera: vcc-camera-regulator {
90		compatible = "regulator-fixed";
91		gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
92		pinctrl-names = "default";
93		pinctrl-0 = <&camera_pwr>;
94		regulator-name = "vcc_camera";
95		enable-active-high;
96		regulator-always-on;
97		regulator-boot-on;
98	};
99
100	wireless_wlan: wireless-wlan {
101		compatible = "wlan-platdata";
102		rockchip,grf = <&grf>;
103		wifi_chip_type = "ap6398s";
104		pinctrl-names = "default";
105		pinctrl-0 = <&wifi_host_wake_irq>;
106		WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
107		status = "okay";
108	};
109
110	wireless_bluetooth: wireless-bluetooth {
111		compatible = "bluetooth-platdata";
112		clocks = <&pmucru CLK_RTC_32K>;
113		clock-names = "ext_clock";
114		//wifi-bt-power-toggle;
115		uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
116		pinctrl-names = "default", "rts_gpio";
117		pinctrl-0 = <&uart1m0_rtsn>;
118		pinctrl-1 = <&uart1_gpios>;
119		BT,reset_gpio    = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
120		BT,wake_gpio     = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
121		BT,wake_host_irq = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
122		status = "okay";
123	};
124};
125
126&combphy1_usq {
127	assigned-clocks = <&pmucru CLK_PCIEPHY1_REF>;
128	assigned-clock-rates = <100000000>;
129	status = "okay";
130};
131
132&combphy2_psq {
133	status = "okay";
134};
135
136&csi2_dphy_hw {
137	status = "okay";
138};
139
140&csi2_dphy0 {
141	status = "okay";
142
143	ports {
144		#address-cells = <1>;
145		#size-cells = <0>;
146		port@0 {
147			reg = <0>;
148			#address-cells = <1>;
149			#size-cells = <0>;
150
151			mipi_in_ucam0: endpoint@1 {
152				reg = <1>;
153				remote-endpoint = <&gc4c33_out>;
154				data-lanes = <1 2>;
155			};
156
157			mipi_in_ucam1: endpoint@2 {
158				reg = <2>;
159				remote-endpoint = <&gc8034_out>;
160				data-lanes = <1 2 3 4>;
161			};
162		};
163
164		port@1 {
165			reg = <1>;
166			#address-cells = <1>;
167			#size-cells = <0>;
168
169			csidphy_out: endpoint@1 {
170				reg = <1>;
171				remote-endpoint = <&isp0_in>;
172			};
173		};
174	};
175};
176
177&gmac1 {
178	phy-mode = "rgmii";
179	clock_in_out = "input";
180
181	snps,reset-gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
182	snps,reset-active-low;
183	/* Reset time is 20ms, 100ms for rtl8211f */
184	snps,reset-delays-us = <0 20000 100000>;
185
186	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
187	assigned-clock-parents =  <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>;
188
189	pinctrl-names = "default";
190	pinctrl-0 = <&gmac1m1_miim
191		     &gmac1m1_tx_bus2
192		     &gmac1m1_rx_bus2
193		     &gmac1m1_rgmii_clk
194		     &gmac1m1_rgmii_bus
195		     &gmac1m1_clkinout>;
196
197	tx_delay = <0x4f>;
198	rx_delay = <0x2d>;
199
200	phy-handle = <&rgmii_phy1>;
201	status = "okay";
202};
203
204&i2c2{
205	status = "okay";
206	pinctrl-names = "default";
207	pinctrl-0 = <&i2c2m1_xfer>;
208
209	gc8034: gc8034@37 {
210		status = "okay";
211		compatible = "galaxycore,gc8034";
212		reg = <0x37>;
213		clocks = <&cru CLK_CIF_OUT>;
214		clock-names = "xvclk";
215		power-domains = <&power RK3568_PD_VI>;
216		pinctrl-names = "default";
217		pinctrl-0 = <&cif_clk>;
218		/*pwren-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;*/
219		reset-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>;
220		pwdn-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>;
221		rockchip,camera-module-index = <0>;
222		rockchip,camera-module-facing = "back";
223		rockchip,camera-module-name = "RK-CMK-8M-2-v1";
224		rockchip,camera-module-lens-name = "CK8401";
225		port {
226			gc8034_out: endpoint {
227				remote-endpoint = <&mipi_in_ucam1>;
228				data-lanes = <1 2 3 4>;
229			};
230		};
231	};
232
233	gc4c33: gc4c33@29 {
234		status = "okay";
235		compatible = "galaxycore,gc4c33";
236		reg = <0x29>;
237		clocks = <&cru CLK_CIF_OUT>;
238		clock-names = "xvclk";
239		power-domains = <&power RK3568_PD_VI>;
240		pinctrl-names = "default";
241		pinctrl-0 = <&cif_clk>;
242		/*pwren-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;*/
243		reset-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
244		pwdn-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
245		rockchip,camera-module-index = <0>;
246		rockchip,camera-module-facing = "back";
247		rockchip,camera-module-name = "PCORW0009A";
248		rockchip,camera-module-lens-name = "40IRC-4M";
249		port {
250			gc4c33_out: endpoint {
251				remote-endpoint = <&mipi_in_ucam0>;
252				data-lanes = <1 2>;
253			};
254		};
255	};
256};
257
258&mdio1 {
259	rgmii_phy1: phy@0 {
260		compatible = "ethernet-phy-ieee802.3-c22";
261		reg = <0x0>;
262	};
263};
264
265&pwm15 {
266	compatible = "rockchip,remotectl-pwm";
267	pinctrl-names = "default";
268	pinctrl-0 = <&pwm15m1_pins>;
269	remote_pwm_id = <3>;
270	handle_cpu_id = <1>;
271	remote_support_psci = <0>;
272	status = "okay";
273
274	ir_key1 {
275		rockchip,usercode = <0x4040>;
276		rockchip,key_table =
277			<0xf2	KEY_REPLY>,
278			<0xba	KEY_BACK>,
279			<0xf4	KEY_UP>,
280			<0xf1	KEY_DOWN>,
281			<0xef	KEY_LEFT>,
282			<0xee	KEY_RIGHT>,
283			<0xbd	KEY_HOME>,
284			<0xea	KEY_VOLUMEUP>,
285			<0xe3	KEY_VOLUMEDOWN>,
286			<0xe2	KEY_SEARCH>,
287			<0xb2	KEY_POWER>,
288			<0xbc	KEY_MUTE>,
289			<0xec	KEY_MENU>,
290			<0xbf	0x190>,
291			<0xe0	0x191>,
292			<0xe1	0x192>,
293			<0xe9	183>,
294			<0xe6	248>,
295			<0xe8	185>,
296			<0xe7	186>,
297			<0xf0	388>,
298			<0xbe	0x175>;
299	};
300
301	ir_key2 {
302		rockchip,usercode = <0xff00>;
303		rockchip,key_table =
304			<0xf9	KEY_HOME>,
305			<0xbf	KEY_BACK>,
306			<0xfb	KEY_MENU>,
307			<0xaa	KEY_REPLY>,
308			<0xb9	KEY_UP>,
309			<0xe9	KEY_DOWN>,
310			<0xb8	KEY_LEFT>,
311			<0xea	KEY_RIGHT>,
312			<0xeb	KEY_VOLUMEDOWN>,
313			<0xef	KEY_VOLUMEUP>,
314			<0xf7	KEY_MUTE>,
315			<0xe7	KEY_POWER>,
316			<0xfc	KEY_POWER>,
317			<0xa9	KEY_VOLUMEDOWN>,
318			<0xa8	KEY_PLAYPAUSE>,
319			<0xe0	KEY_VOLUMEDOWN>,
320			<0xa5	KEY_VOLUMEDOWN>,
321			<0xab	183>,
322			<0xb7	388>,
323			<0xe8	388>,
324			<0xf8	184>,
325			<0xaf	185>,
326			<0xed	KEY_VOLUMEDOWN>,
327			<0xee	186>,
328			<0xb3	KEY_VOLUMEDOWN>,
329			<0xf1	KEY_VOLUMEDOWN>,
330			<0xf2	KEY_VOLUMEDOWN>,
331			<0xf3	KEY_SEARCH>,
332			<0xb4	KEY_VOLUMEDOWN>,
333			<0xa4	KEY_SETUP>,
334			<0xbe	KEY_SEARCH>;
335	};
336
337	ir_key3 {
338		rockchip,usercode = <0x1dcc>;
339		rockchip,key_table =
340			<0xee	KEY_REPLY>,
341			<0xf0	KEY_BACK>,
342			<0xf8	KEY_UP>,
343			<0xbb	KEY_DOWN>,
344			<0xef	KEY_LEFT>,
345			<0xed	KEY_RIGHT>,
346			<0xfc	KEY_HOME>,
347			<0xf1	KEY_VOLUMEUP>,
348			<0xfd	KEY_VOLUMEDOWN>,
349			<0xb7	KEY_SEARCH>,
350			<0xff	KEY_POWER>,
351			<0xf3	KEY_MUTE>,
352			<0xbf	KEY_MENU>,
353			<0xf9	0x191>,
354			<0xf5	0x192>,
355			<0xb3	388>,
356			<0xbe	KEY_1>,
357			<0xba	KEY_2>,
358			<0xb2	KEY_3>,
359			<0xbd	KEY_4>,
360			<0xf9	KEY_5>,
361			<0xb1	KEY_6>,
362			<0xfc	KEY_7>,
363			<0xf8	KEY_8>,
364			<0xb0	KEY_9>,
365			<0xb6	KEY_0>,
366			<0xb5	KEY_BACKSPACE>;
367	};
368};
369
370/* Need to be modified according to the actual hardware */
371&pmu_io_domains {
372	status = "okay";
373	pmuio2-supply = <&vcc_3v3>;
374	vccio1-supply = <&vcc_3v3>;
375	vccio3-supply = <&vcc_3v3>;
376	vccio4-supply = <&vcc_3v3>;
377	vccio5-supply = <&vcc_3v3>;
378	vccio6-supply = <&vcc_3v3>;
379	vccio7-supply = <&vcc_3v3>;
380};
381
382&rkisp {
383	status = "okay";
384};
385
386&rkisp_mmu {
387	status = "okay";
388};
389
390&rkisp_vir0 {
391	status = "okay";
392
393	port {
394		#address-cells = <1>;
395		#size-cells = <0>;
396
397		isp0_in: endpoint@0 {
398			reg = <0>;
399			remote-endpoint = <&csidphy_out>;
400		};
401	};
402};
403
404&sata2 {
405	status = "okay";
406};
407
408&sdmmc0 {
409	max-frequency = <50000000>;
410	no-sdio;
411	no-mmc;
412	bus-width = <4>;
413	cap-mmc-highspeed;
414	cap-sd-highspeed;
415	disable-wp;
416	//sd-uhs-sdr104;
417	vmmc-supply = <&vcc3v3_sd>;
418	vqmmc-supply = <&vccio_sd>;
419	pinctrl-names = "default";
420	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
421	status = "okay";
422};
423
424&sdmmc1 {
425	max-frequency = <150000000>;
426	no-sd;
427	no-mmc;
428	bus-width = <4>;
429	disable-wp;
430	cap-sd-highspeed;
431	cap-sdio-irq;
432	keep-power-in-suspend;
433	non-removable;
434	mmc-pwrseq = <&sdio_pwrseq>;
435	pinctrl-names = "default";
436	pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
437	sd-uhs-sdr104;
438	status = "okay";
439};
440
441&uart1 {
442	status = "okay";
443	pinctrl-names = "default";
444	pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
445};
446
447&u2phy0_host {
448	phy-supply = <&vcc5v0_host>;
449	status = "okay";
450};
451
452&u2phy0_otg {
453	vbus-supply = <&vcc5v0_otg>;
454	status = "okay";
455};
456
457&u2phy1_host {
458	phy-supply = <&vcc5v0_host>;
459	status = "okay";
460};
461
462&u2phy1_otg {
463	phy-supply = <&vcc5v0_host>;
464	status = "okay";
465};
466
467&usb2phy1 {
468	status = "okay";
469};
470
471&usb_host0_ehci {
472	status = "okay";
473};
474
475&usb_host0_ohci {
476	status = "okay";
477};
478
479&usb_host1_ehci {
480	status = "okay";
481};
482
483&usb_host1_ohci {
484	status = "okay";
485};
486
487&pinctrl {
488	cam {
489		camera_pwr: camera-pwr {
490			rockchip,pins =
491				/* camera power en */
492				<0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
493		};
494	};
495
496	sdio-pwrseq {
497		wifi_enable_h: wifi-enable-h {
498			rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
499		};
500
501		wifi_32k: wifi-32k {
502			rockchip,pins = <2 RK_PC6 1 &pcfg_pull_none>;
503		};
504	};
505
506	usb {
507		vcc5v0_host_en: vcc5v0-host-en {
508			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
509		};
510
511		vcc5v0_otg_en: vcc5v0-otg-en {
512			rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
513		};
514
515	};
516
517	wireless-wlan {
518		wifi_host_wake_irq: wifi-host-wake-irq {
519			rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
520		};
521	};
522
523	wireless-bluetooth {
524		uart1_gpios: uart1-gpios {
525			rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
526		};
527	};
528};
529