1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2022 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7/ { 8 chosen: chosen { 9 bootargs = "earlycon=uart8250,mmio32,0xff210000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rw rootwait"; 10 }; 11 12 fiq-debugger { 13 compatible = "rockchip,fiq-debugger"; 14 rockchip,serial-id = <0>; 15 rockchip,wake-irq = <0>; 16 /* If enable uart uses irq instead of fiq */ 17 rockchip,irq-mode-enable = <1>; 18 rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */ 19 interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; 20 pinctrl-names = "default"; 21 pinctrl-0 = <&uart0m0_xfer>; 22 status = "okay"; 23 }; 24}; 25 26&rng { 27 status = "okay"; 28}; 29