1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2// Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd 3 4/dts-v1/; 5#include <dt-bindings/gpio/gpio.h> 6#include <dt-bindings/pinctrl/rockchip.h> 7#include <dt-bindings/input/input.h> 8#include <dt-bindings/display/drm_mipi_dsi.h> 9#include <dt-bindings/sensor-dev.h> 10#include <dt-bindings/pwm/pwm.h> 11#include "dt-bindings/usb/pd.h" 12#include "rk3399pro.dtsi" 13#include "rk3399-linux.dtsi" 14#include "rk3399-opp.dtsi" 15#include "rk3399-vop-clk-set.dtsi" 16 17/ { 18 compatible = "rockchip,rk3399pro-evb-v11-linux", "rockchip,rk3399pro"; 19 20 adc-keys { 21 compatible = "adc-keys"; 22 io-channels = <&saradc 2>; 23 io-channel-names = "buttons"; 24 poll-interval = <100>; 25 keyup-threshold-microvolt = <1800000>; 26 27 esc-key { 28 linux,code = <KEY_ESC>; 29 label = "esc"; 30 press-threshold-microvolt = <1310000>; 31 }; 32 33 menu-key { 34 linux,code = <KEY_MENU>; 35 label = "menu"; 36 press-threshold-microvolt = <987000>; 37 }; 38 39 home-key { 40 linux,code = <KEY_HOME>; 41 label = "home"; 42 press-threshold-microvolt = <624000>; 43 }; 44 45 vol-down-key { 46 linux,code = <KEY_VOLUMEDOWN>; 47 label = "volume down"; 48 press-threshold-microvolt = <300000>; 49 }; 50 51 vol-up-key { 52 linux,code = <KEY_VOLUMEUP>; 53 label = "volume up"; 54 press-threshold-microvolt = <17000>; 55 }; 56 }; 57 58 backlight: backlight { 59 compatible = "pwm-backlight"; 60 pwms = <&pwm0 0 25000 0>; 61 brightness-levels = < 62 0 20 20 21 21 22 22 23 63 23 24 24 25 25 26 26 27 64 27 28 28 29 29 30 30 31 65 31 32 32 33 33 34 34 35 66 35 36 36 37 37 38 38 39 67 40 41 42 43 44 45 46 47 68 48 49 50 51 52 53 54 55 69 56 57 58 59 60 61 62 63 70 64 65 66 67 68 69 70 71 71 72 73 74 75 76 77 78 79 72 80 81 82 83 84 85 86 87 73 88 89 90 91 92 93 94 95 74 96 97 98 99 100 101 102 103 75 104 105 106 107 108 109 110 111 76 112 113 114 115 116 117 118 119 77 120 121 122 123 124 125 126 127 78 128 129 130 131 132 133 134 135 79 136 137 138 139 140 141 142 143 80 144 145 146 147 148 149 150 151 81 152 153 154 155 156 157 158 159 82 160 161 162 163 164 165 166 167 83 168 169 170 171 172 173 174 175 84 176 177 178 179 180 181 182 183 85 184 185 186 187 188 189 190 191 86 192 193 194 195 196 197 198 199 87 200 201 202 203 204 205 206 207 88 208 209 210 211 212 213 214 215 89 216 217 218 219 220 221 222 223 90 224 225 226 227 228 229 230 231 91 232 233 234 235 236 237 238 239 92 240 241 242 243 244 245 246 247 93 248 249 250 251 252 253 254 255 94 >; 95 default-brightness-level = <200>; 96 enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; 97 }; 98 99 clkin_gmac: external-gmac-clock { 100 compatible = "fixed-clock"; 101 clock-frequency = <125000000>; 102 clock-output-names = "clkin_gmac"; 103 #clock-cells = <0>; 104 }; 105 106 fiq_debugger: fiq-debugger { 107 compatible = "rockchip,fiq-debugger"; 108 rockchip,serial-id = <2>; 109 rockchip,wake-irq = <0>; 110 rockchip,irq-mode-enable = <0>; /* If enable uart uses irq instead of fiq */ 111 rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */ 112 pinctrl-names = "default"; 113 pinctrl-0 = <&uart2c_xfer>; 114 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH 0>; 115 }; 116 117 hdmi_sound: hdmi-sound { 118 status = "okay"; 119 compatible = "simple-audio-card"; 120 simple-audio-card,format = "i2s"; 121 simple-audio-card,mclk-fs = <256>; 122 simple-audio-card,name = "rockchip,hdmi"; 123 124 simple-audio-card,cpu { 125 sound-dai = <&i2s2>; 126 }; 127 simple-audio-card,codec { 128 sound-dai = <&hdmi>; 129 }; 130 }; 131 132 panel: panel { 133 compatible = "simple-panel"; 134 backlight = <&backlight>; 135 enable-gpios = <&gpio4 RK_PD6 GPIO_ACTIVE_HIGH>; 136 prepare-delay-ms = <20>; 137 enable-delay-ms = <20>; 138 reset-delay-ms = <20>; 139 140 display-timings { 141 native-mode = <&timing0>; 142 143 timing0: timing0 { 144 clock-frequency = <200000000>; 145 hactive = <1536>; 146 vactive = <2048>; 147 hfront-porch = <12>; 148 hsync-len = <16>; 149 hback-porch = <48>; 150 vfront-porch = <8>; 151 vsync-len = <4>; 152 vback-porch = <8>; 153 hsync-active = <0>; 154 vsync-active = <0>; 155 de-active = <0>; 156 pixelclk-active = <0>; 157 }; 158 }; 159 160 ports { 161 panel_in: endpoint { 162 remote-endpoint = <&edp_out>; 163 }; 164 }; 165 }; 166 167 rk809_sound: rk809-sound { 168 compatible = "rockchip,multicodecs-card"; 169 rockchip,card-name = "rockchip,rk809-codec"; 170 rockchip,codec-hp-det; 171 rockchip,mclk-fs = <256>; 172 rockchip,cpu = <&i2s1>; 173 rockchip,codec = <&rk809_codec>; 174 }; 175 176 rk_headset: rk-headset { 177 compatible = "rockchip_headset"; 178 headset_gpio = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; 179 pinctrl-names = "default"; 180 pinctrl-0 = <&hp_det>; 181 io-channels = <&saradc 3>; 182 }; 183 184 sdio_pwrseq: sdio-pwrseq { 185 compatible = "mmc-pwrseq-simple"; 186 clocks = <&rk809 1>; 187 clock-names = "ext_clock"; 188 pinctrl-names = "default"; 189 pinctrl-0 = <&wifi_enable_h>; 190 191 /* 192 * On the module itself this is one of these (depending 193 * on the actual card populated): 194 * - SDIO_RESET_L_WL_REG_ON 195 * - PDN (power down when low) 196 */ 197 reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; 198 }; 199 200 usbacm_video_control: usbacm-video-control { 201 compatible = "rockchip,usbacm-video-control"; 202 status = "disabled"; 203 }; 204 205 vbus_typec: vbus-typec-regulator { 206 compatible = "regulator-fixed"; 207 enable-active-high; 208 gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>; 209 pinctrl-names = "default"; 210 pinctrl-0 = <&vcc5v0_typec0_en>; 211 regulator-name = "vbus_typec"; 212 vin-supply = <&vcc5v0_sys>; 213 }; 214 215 vbus_typec: vbus-typec-regulator { 216 compatible = "regulator-fixed"; 217 enable-active-high; 218 gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>; 219 pinctrl-names = "default"; 220 pinctrl-0 = <&vcc5v0_typec0_en>; 221 regulator-name = "vbus_typec"; 222 vin-supply = <&vcc5v0_sys>; 223 }; 224 225 vcc_phy: vcc-phy-regulator { 226 compatible = "regulator-fixed"; 227 regulator-name = "vcc_phy"; 228 regulator-always-on; 229 regulator-boot-on; 230 }; 231 232 vcc5v0_sys: vccsys { 233 compatible = "regulator-fixed"; 234 regulator-name = "vcc5v0_sys"; 235 regulator-always-on; 236 regulator-boot-on; 237 regulator-min-microvolt = <5000000>; 238 regulator-max-microvolt = <5000000>; 239 }; 240 241 wireless-wlan { 242 compatible = "wlan-platdata"; 243 rockchip,grf = <&grf>; 244 wifi_chip_type = "ap6398s"; 245 sdio_vref = <1800>; 246 WIFI,host_wake_irq = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>; 247 status = "okay"; 248 }; 249 250 wireless-bluetooth { 251 compatible = "bluetooth-platdata"; 252 clocks = <&rk809 1>; 253 clock-names = "ext_clock"; 254 uart_rts_gpios = <&gpio2 RK_PC3 GPIO_ACTIVE_LOW>; 255 pinctrl-names = "default", "rts_gpio"; 256 pinctrl-0 = <&uart0_rts>, <&bt_irq_gpio>; 257 pinctrl-1 = <&uart0_gpios>; 258 BT,reset_gpio = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; 259 BT,wake_gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; 260 BT,wake_host_irq = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; 261 status = "okay"; 262 }; 263}; 264 265&cdn_dp { 266 status = "okay"; 267 phys = <&tcphy0_dp>; 268}; 269 270&cpu_l0 { 271 cpu-supply = <&vdd_cpu_l>; 272}; 273 274&cpu_l1 { 275 cpu-supply = <&vdd_cpu_l>; 276}; 277 278&cpu_l2 { 279 cpu-supply = <&vdd_cpu_l>; 280}; 281 282&cpu_l3 { 283 cpu-supply = <&vdd_cpu_l>; 284}; 285 286&cpu_b0 { 287 cpu-supply = <&vdd_cpu_b>; 288}; 289 290&cpu_b1 { 291 cpu-supply = <&vdd_cpu_b>; 292}; 293 294&display_subsystem { 295 status = "okay"; 296}; 297 298&dmc { 299 status = "okay"; 300 center-supply = <&vdd_center>; 301}; 302 303&dp_in_vopb { 304 status = "disabled"; 305}; 306 307&edp { 308 status = "okay"; 309 force-hpd; 310 311 ports { 312 port@1 { 313 reg = <1>; 314 315 edp_out: endpoint { 316 remote-endpoint = <&panel_in>; 317 }; 318 }; 319 }; 320}; 321 322&edp_in_vopb { 323 status = "disabled"; 324}; 325 326&emmc_phy { 327 status = "okay"; 328}; 329 330&fiq_debugger { 331 pinctrl-0 = <&uart2a_xfer>; 332}; 333 334&gmac { 335 phy-supply = <&vcc_phy>; 336 phy-mode = "rgmii"; 337 clock_in_out = "input"; 338 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 339 snps,reset-active-low; 340 snps,reset-delays-us = <0 10000 50000>; 341 assigned-clocks = <&cru SCLK_RMII_SRC>; 342 assigned-clock-parents = <&clkin_gmac>; 343 pinctrl-names = "default"; 344 pinctrl-0 = <&rgmii_pins>; 345 tx_delay = <0x28>; 346 rx_delay = <0x11>; 347 status = "okay"; 348}; 349 350&gpu { 351 status = "okay"; 352 mali-supply = <&vdd_gpu>; 353}; 354 355&hdmi { 356 status = "okay"; 357 #sound-dai-cells = <0>; 358 rockchip,phy-table = 359 <74250000 0x8009 0x0004 0x0272>, 360 <165000000 0x802b 0x0004 0x0209>, 361 <297000000 0x8039 0x0005 0x028d>, 362 <594000000 0x8039 0x0000 0x00f6>, 363 <000000000 0x0000 0x0000 0x0000>; 364}; 365 366&hdmi_in_vopl { 367 status = "disabled"; 368}; 369 370&i2c0 { 371 status = "okay"; 372 i2c-scl-rising-time-ns = <180>; 373 i2c-scl-falling-time-ns = <30>; 374 clock-frequency = <400000>; 375 376 rk809: pmic@20 { 377 compatible = "rockchip,rk809"; 378 reg = <0x20>; 379 interrupt-parent = <&gpio1>; 380 interrupts = <RK_PC2 IRQ_TYPE_LEVEL_LOW>; 381 pinctrl-names = "default", "pmic-sleep", 382 "pmic-power-off", "pmic-reset"; 383 pinctrl-0 = <&pmic_int_l>; 384 pinctrl-1 = <&soc_slppin_slp>, <&rk809_slppin_slp>; 385 pinctrl-2 = <&soc_slppin_gpio>, <&rk809_slppin_pwrdn>; 386 pinctrl-3 = <&soc_slppin_gpio>, <&rk809_slppin_null>; 387 rockchip,system-power-controller; 388 pmic-reset-func = <0>; 389 wakeup-source; 390 #clock-cells = <1>; 391 clock-output-names = "rk808-clkout1", "rk808-clkout2"; 392 393 vcc1-supply = <&vcc5v0_sys>; 394 vcc2-supply = <&vcc5v0_sys>; 395 vcc3-supply = <&vcc5v0_sys>; 396 vcc4-supply = <&vcc5v0_sys>; 397 vcc5-supply = <&vcc_buck5>; 398 vcc6-supply = <&vcc_buck5>; 399 vcc7-supply = <&vcc3v3_sys>; 400 vcc8-supply = <&vcc3v3_sys>; 401 vcc9-supply = <&vcc5v0_sys>; 402 403 pwrkey { 404 status = "okay"; 405 }; 406 407 rtc { 408 status = "okay"; 409 }; 410 411 pinctrl_rk8xx: pinctrl_rk8xx { 412 gpio-controller; 413 #gpio-cells = <2>; 414 415 rk809_slppin_null: rk809_slppin_null { 416 pins = "gpio_slp"; 417 function = "pin_fun0"; 418 }; 419 420 rk809_slppin_slp: rk809_slppin_slp { 421 pins = "gpio_slp"; 422 function = "pin_fun1"; 423 }; 424 425 rk809_slppin_pwrdn: rk809_slppin_pwrdn { 426 pins = "gpio_slp"; 427 function = "pin_fun2"; 428 }; 429 430 rk809_slppin_rst: rk809_slppin_rst { 431 pins = "gpio_slp"; 432 function = "pin_fun3"; 433 }; 434 }; 435 436 regulators { 437 vdd_center: DCDC_REG1 { 438 regulator-always-on; 439 regulator-boot-on; 440 regulator-min-microvolt = <750000>; 441 regulator-max-microvolt = <1350000>; 442 regulator-initial-mode = <0x2>; 443 regulator-name = "vdd_center"; 444 regulator-state-mem { 445 regulator-off-in-suspend; 446 regulator-suspend-microvolt = <900000>; 447 }; 448 }; 449 450 vdd_cpu_l: DCDC_REG2 { 451 regulator-always-on; 452 regulator-boot-on; 453 regulator-min-microvolt = <750000>; 454 regulator-max-microvolt = <1350000>; 455 regulator-ramp-delay = <6001>; 456 regulator-initial-mode = <0x2>; 457 regulator-name = "vdd_cpu_l"; 458 regulator-state-mem { 459 regulator-off-in-suspend; 460 }; 461 }; 462 463 vcc_ddr: DCDC_REG3 { 464 regulator-always-on; 465 regulator-boot-on; 466 regulator-name = "vcc_ddr"; 467 regulator-initial-mode = <0x2>; 468 regulator-state-mem { 469 regulator-on-in-suspend; 470 }; 471 }; 472 473 vcc3v3_sys: DCDC_REG4 { 474 regulator-always-on; 475 regulator-boot-on; 476 regulator-min-microvolt = <3300000>; 477 regulator-max-microvolt = <3300000>; 478 regulator-initial-mode = <0x2>; 479 regulator-name = "vcc3v3_sys"; 480 regulator-state-mem { 481 regulator-on-in-suspend; 482 regulator-suspend-microvolt = <3300000>; 483 }; 484 }; 485 486 vcc_buck5: DCDC_REG5 { 487 regulator-always-on; 488 regulator-boot-on; 489 regulator-min-microvolt = <2200000>; 490 regulator-max-microvolt = <2200000>; 491 regulator-name = "vcc_buck5"; 492 regulator-state-mem { 493 regulator-on-in-suspend; 494 regulator-suspend-microvolt = <2200000>; 495 }; 496 }; 497 498 vcca_0v9: LDO_REG1 { 499 regulator-always-on; 500 regulator-boot-on; 501 regulator-min-microvolt = <900000>; 502 regulator-max-microvolt = <900000>; 503 regulator-name = "vcca_0v9"; 504 regulator-state-mem { 505 regulator-off-in-suspend; 506 }; 507 }; 508 509 vcc_1v8: LDO_REG2 { 510 regulator-always-on; 511 regulator-boot-on; 512 regulator-min-microvolt = <1800000>; 513 regulator-max-microvolt = <1800000>; 514 515 regulator-name = "vcc_1v8"; 516 regulator-state-mem { 517 regulator-on-in-suspend; 518 regulator-suspend-microvolt = <1800000>; 519 }; 520 }; 521 522 vcc0v9_soc: LDO_REG3 { 523 regulator-always-on; 524 regulator-boot-on; 525 regulator-min-microvolt = <900000>; 526 regulator-max-microvolt = <900000>; 527 528 regulator-name = "vcc0v9_soc"; 529 regulator-state-mem { 530 regulator-on-in-suspend; 531 regulator-suspend-microvolt = <900000>; 532 }; 533 }; 534 535 vcca_1v8: LDO_REG4 { 536 regulator-always-on; 537 regulator-boot-on; 538 regulator-min-microvolt = <1800000>; 539 regulator-max-microvolt = <1800000>; 540 541 regulator-name = "vcca_1v8"; 542 regulator-state-mem { 543 regulator-off-in-suspend; 544 }; 545 }; 546 547 vdd1v5_dvp: LDO_REG5 { 548 regulator-always-on; 549 regulator-boot-on; 550 regulator-min-microvolt = <1500000>; 551 regulator-max-microvolt = <1500000>; 552 553 regulator-name = "vdd1v5_dvp"; 554 regulator-state-mem { 555 regulator-off-in-suspend; 556 }; 557 }; 558 559 vcc_1v5: LDO_REG6 { 560 regulator-always-on; 561 regulator-boot-on; 562 regulator-min-microvolt = <1500000>; 563 regulator-max-microvolt = <1500000>; 564 565 regulator-name = "vcc_1v5"; 566 regulator-state-mem { 567 regulator-off-in-suspend; 568 }; 569 }; 570 571 vcc_3v0: LDO_REG7 { 572 regulator-always-on; 573 regulator-boot-on; 574 regulator-min-microvolt = <3000000>; 575 regulator-max-microvolt = <3000000>; 576 577 regulator-name = "vcc_3v0"; 578 regulator-state-mem { 579 regulator-off-in-suspend; 580 }; 581 }; 582 583 vccio_sd: LDO_REG8 { 584 regulator-always-on; 585 regulator-boot-on; 586 regulator-min-microvolt = <1800000>; 587 regulator-max-microvolt = <3300000>; 588 589 regulator-name = "vccio_sd"; 590 regulator-state-mem { 591 regulator-off-in-suspend; 592 }; 593 }; 594 595 vcc_sd: LDO_REG9 { 596 regulator-always-on; 597 regulator-boot-on; 598 regulator-min-microvolt = <3300000>; 599 regulator-max-microvolt = <3300000>; 600 601 regulator-name = "vcc_sd"; 602 regulator-state-mem { 603 regulator-off-in-suspend; 604 }; 605 }; 606 607 vcc5v0_usb: SWITCH_REG1 { 608 regulator-name = "vcc5v0_usb"; 609 regulator-state-mem { 610 regulator-on-in-suspend; 611 }; 612 }; 613 614 vccio_3v3: SWITCH_REG2 { 615 regulator-always-on; 616 regulator-boot-on; 617 regulator-name = "vccio_3v3"; 618 regulator-state-mem { 619 regulator-off-in-suspend; 620 }; 621 }; 622 }; 623 624 rk809_codec: codec { 625 #sound-dai-cells = <0>; 626 compatible = "rockchip,rk809-codec", "rockchip,rk817-codec"; 627 clocks = <&cru SCLK_I2S_8CH_OUT>; 628 clock-names = "mclk"; 629 pinctrl-names = "default"; 630 pinctrl-0 = <&i2s_8ch_mclk>; 631 hp-volume = <20>; 632 spk-volume = <3>; 633 status = "okay"; 634 }; 635 }; 636 637 vdd_cpu_b: tcs4525@1c { 638 compatible = "tcs,tcs4525"; 639 reg = <0x1c>; 640 vin-supply = <&vcc5v0_sys>; 641 regulator-compatible = "fan53555-reg"; 642 pinctrl-0 = <&vsel1_gpio>; 643 vsel-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; 644 regulator-name = "vdd_cpu_b"; 645 regulator-min-microvolt = <712500>; 646 regulator-max-microvolt = <1500000>; 647 regulator-ramp-delay = <2300>; 648 fcs,suspend-voltage-selector = <1>; 649 regulator-always-on; 650 regulator-boot-on; 651 regulator-initial-state = <3>; 652 regulator-state-mem { 653 regulator-off-in-suspend; 654 }; 655 }; 656 657 vdd_gpu: tcs4526@10 { 658 compatible = "tcs,tcs4526"; 659 reg = <0x10>; 660 vin-supply = <&vcc5v0_sys>; 661 regulator-compatible = "fan53555-reg"; 662 pinctrl-0 = <&vsel2_gpio>; 663 vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; 664 regulator-name = "vdd_gpu"; 665 regulator-min-microvolt = <735000>; 666 regulator-max-microvolt = <1400000>; 667 regulator-ramp-delay = <1000>; 668 fcs,suspend-voltage-selector = <1>; 669 regulator-always-on; 670 regulator-boot-on; 671 regulator-initial-state = <3>; 672 regulator-state-mem { 673 regulator-off-in-suspend; 674 }; 675 }; 676 677 bq25700: bq25700@6b { 678 compatible = "ti,bq25703"; 679 reg = <0x6b>; 680 interrupt-parent = <&gpio1>; 681 interrupts = <RK_PA1 IRQ_TYPE_LEVEL_LOW>; 682 pinctrl-names = "default"; 683 pinctrl-0 = <&charger_ok_int>; 684 ti,charge-current = <1500000>; 685 ti,max-charge-voltage = <8704000>; 686 ti,max-input-voltage = <20000000>; 687 ti,max-input-current = <6000000>; 688 ti,input-current-sdp = <500000>; 689 ti,input-current-dcp = <2000000>; 690 ti,input-current-cdp = <2000000>; 691 ti,input-current-dc = <2000000>; 692 ti,minimum-sys-voltage = <6700000>; 693 ti,otg-voltage = <5000000>; 694 ti,otg-current = <500000>; 695 ti,input-current = <500000>; 696 pd-charge-only = <0>; 697 status = "disabled"; 698 }; 699}; 700 701&i2c1 { 702 status = "okay"; 703 i2c-scl-rising-time-ns = <140>; 704 i2c-scl-falling-time-ns = <30>; 705 706 mpu6500@68 { 707 status = "okay"; 708 compatible = "invensense,mpu6500"; 709 reg = <0x68>; 710 irq-gpio = <&gpio3 RK_PD2 IRQ_TYPE_EDGE_RISING>; 711 mpu-int_config = <0x10>; 712 mpu-level_shifter = <0>; 713 mpu-orientation = <0 1 0 1 0 0 0 0 1>; 714 orientation-x= <1>; 715 orientation-y= <0>; 716 orientation-z= <0>; 717 mpu-debug = <1>; 718 }; 719 720 sensor@d { 721 status = "okay"; 722 compatible = "ak8963"; 723 reg = <0x0d>; 724 type = <SENSOR_TYPE_COMPASS>; 725 irq-gpio = <&gpio3 RK_PD7 IRQ_TYPE_EDGE_RISING>; 726 irq_enable = <0>; 727 poll_delay_ms = <30>; 728 layout = <3>; 729 }; 730 731 vm149c: vm149c@0c { 732 compatible = "silicon touch,vm149c"; 733 status = "okay"; 734 reg = <0x0c>; 735 rockchip,camera-module-index = <0>; 736 rockchip,camera-module-facing = "back"; 737 }; 738 739 ov13850: ov13850@10 { 740 compatible = "ovti,ov13850"; 741 status = "okay"; 742 reg = <0x10>; 743 clocks = <&cru SCLK_CIF_OUT>; 744 clock-names = "xvclk"; 745 746 /* conflict with csi-ctl-gpios */ 747 reset-gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; 748 pwdn-gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>; 749 pinctrl-names = "rockchip,camera_default"; 750 pinctrl-0 = <&cif_clkout>; 751 752 lens-focus = <&vm149c>; 753 754 port { 755 ucam_out0: endpoint { 756 remote-endpoint = <&mipi_in_ucam0>; 757 data-lanes = <1 2>; 758 }; 759 }; 760 }; 761 762 imx327: imx327@1a { 763 compatible = "sony,imx327"; 764 status = "okay"; 765 reg = <0x1a>; 766 clocks = <&cru SCLK_CIF_OUT>; 767 clock-names = "xvclk"; 768 /* conflict with csi-ctl-gpios */ 769 reset-gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; 770 pwdn-gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>; 771 pinctrl-names = "default"; 772 pinctrl-0 = <&cif_clkout>; 773 rockchip,camera-module-index = <0>; 774 rockchip,camera-module-facing = "back"; 775 rockchip,camera-module-name = "TongJu"; 776 rockchip,camera-module-lens-name = "CHT842-MD"; 777 port { 778 ucam_out2: endpoint { 779 remote-endpoint = <&mipi_in_ucam2>; 780 data-lanes = <1 2>; 781 }; 782 }; 783 }; 784 785}; 786 787&i2c4 { 788 status = "okay"; 789 i2c-scl-rising-time-ns = <345>; 790 i2c-scl-falling-time-ns = <11>; 791 792 gsl3673: gsl3673@40 { 793 compatible = "GSL,GSL3673"; 794 reg = <0x40>; 795 screen_max_x = <1536>; 796 screen_max_y = <2048>; 797 irq_gpio_number = <&gpio4 RK_PC3 IRQ_TYPE_LEVEL_LOW>; 798 rst_gpio_number = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; 799 }; 800}; 801 802&i2c8 { 803 status = "okay"; 804 i2c-scl-rising-time-ns = <345>; 805 i2c-scl-falling-time-ns = <11>; 806 clock-frequency = <100000>; 807 808 usbc0: fusb302@22 { 809 compatible = "fcs,fusb302"; 810 reg = <0x22>; 811 interrupt-parent = <&gpio1>; 812 interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>; 813 pinctrl-names = "default"; 814 pinctrl-0 = <&usbc0_int>; 815 vbus-supply = <&vbus_typec>; 816 status = "okay"; 817 818 ports { 819 #address-cells = <1>; 820 #size-cells = <0>; 821 822 port@0 { 823 reg = <0>; 824 usbc0_role_sw: endpoint@0 { 825 remote-endpoint = <&dwc3_0_role_switch>; 826 }; 827 }; 828 }; 829 830 usb_con: connector { 831 compatible = "usb-c-connector"; 832 label = "USB-C"; 833 data-role = "dual"; 834 power-role = "dual"; 835 try-power-role = "sink"; 836 op-sink-microwatt = <1000000>; 837 sink-pdos = 838 <PDO_FIXED(5000, 2500, PDO_FIXED_USB_COMM)>; 839 source-pdos = 840 <PDO_FIXED(5000, 1500, PDO_FIXED_USB_COMM)>; 841 842 ports { 843 #address-cells = <1>; 844 #size-cells = <0>; 845 846 port@0 { 847 reg = <0>; 848 usbc0_orien_sw: endpoint { 849 remote-endpoint = <&tcphy0_orientation_switch>; 850 }; 851 }; 852 }; 853 }; 854 }; 855}; 856 857&i2s1 { 858 status = "okay"; 859 #sound-dai-cells = <0>; 860}; 861 862&i2s2 { 863 #sound-dai-cells = <0>; 864 status = "okay"; 865}; 866 867&io_domains { 868 status = "okay"; 869 bt656-supply = <&vcca_1v8>; 870 audio-supply = <&vcca_1v8>; 871 sdmmc-supply = <&vccio_sd>; 872 gpio1830-supply = <&vcc_3v0>; 873}; 874 875&isp0_mmu { 876 status = "okay"; 877}; 878 879&isp1_mmu { 880 status = "okay"; 881}; 882 883&mipi_dphy_tx1rx1 { 884 status = "okay"; 885 886 ports { 887 #address-cells = <1>; 888 #size-cells = <0>; 889 890 port@0 { 891 reg = <0>; 892 #address-cells = <1>; 893 #size-cells = <0>; 894 895 mipi_in_ucam1: endpoint@1 { 896 reg = <1>; 897 /* Unlinked camera */ 898 //remote-endpoint = <&ucam_out1>; 899 data-lanes = <1 2>; 900 }; 901 }; 902 903 port@1 { 904 reg = <1>; 905 #address-cells = <1>; 906 #size-cells = <0>; 907 908 dphy_tx1rx1_out: endpoint@0 { 909 reg = <0>; 910 remote-endpoint = <&isp1_mipi_in>; 911 }; 912 }; 913 }; 914}; 915 916&mipi_dphy_rx0 { 917 status = "okay"; 918 919 ports { 920 #address-cells = <1>; 921 #size-cells = <0>; 922 923 port@0 { 924 reg = <0>; 925 #address-cells = <1>; 926 #size-cells = <0>; 927 928 mipi_in_ucam0: endpoint@1 { 929 reg = <1>; 930 remote-endpoint = <&ucam_out0>; 931 data-lanes = <1 2>; 932 }; 933 934 mipi_in_ucam2: endpoint@2 { 935 reg = <2>; 936 remote-endpoint = <&ucam_out2>; 937 data-lanes = <1 2>; 938 }; 939 }; 940 941 port@1 { 942 reg = <1>; 943 #address-cells = <1>; 944 #size-cells = <0>; 945 946 dphy_rx0_out: endpoint@0 { 947 reg = <0>; 948 remote-endpoint = <&isp0_mipi_in>; 949 }; 950 }; 951 }; 952}; 953 954&pcie_phy { 955 status = "okay"; 956}; 957 958&pcie0 { 959 status = "okay"; 960}; 961 962&pmu_io_domains { 963 status = "okay"; 964 pmu1830-supply = <&vcc_1v8>; 965}; 966 967&pwm0 { 968 status = "okay"; 969}; 970 971&pwm2 { 972 status = "okay"; 973}; 974 975&rkisp1_0 { 976 status = "okay"; 977 assigned-clocks = <&cru PLL_NPLL>, <&cru SCLK_CIF_OUT_SRC>, <&cru SCLK_CIF_OUT>; 978 assigned-clock-rates = <594000000>, <594000000>, <37125000>; 979 980 port { 981 #address-cells = <1>; 982 #size-cells = <0>; 983 984 isp0_mipi_in: endpoint@0 { 985 reg = <0>; 986 remote-endpoint = <&dphy_rx0_out>; 987 }; 988 }; 989}; 990 991&rkisp1_1 { 992 status = "okay"; 993 994 port { 995 #address-cells = <1>; 996 #size-cells = <0>; 997 998 isp1_mipi_in: endpoint@0 { 999 reg = <0>; 1000 remote-endpoint = <&dphy_tx1rx1_out>; 1001 }; 1002 }; 1003}; 1004 1005&rockchip_suspend { 1006 status = "okay"; 1007 rockchip,sleep-debug-en = <1>; 1008 rockchip,sleep-mode-config = < 1009 (0 1010 | RKPM_SLP_ARMPD 1011 | RKPM_SLP_PERILPPD 1012 | RKPM_SLP_DDR_RET 1013 | RKPM_SLP_PLLPD 1014 | RKPM_SLP_CENTER_PD 1015 | RKPM_SLP_OSC_DIS 1016 | RKPM_SLP_AP_PWROFF 1017 ) 1018 >; 1019 rockchip,wakeup-config = <RKPM_GPIO_WKUP_EN>; 1020 rockchip,pwm-regulator-config = <PWM2_REGULATOR_EN>; 1021 rockchip,power-ctrl = 1022 <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>, 1023 <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; 1024}; 1025 1026&route_edp { 1027 status = "okay"; 1028}; 1029 1030&saradc { 1031 status = "okay"; 1032 vref-supply = <&vcc_1v8>; 1033}; 1034 1035&sdmmc { 1036 sd-uhs-sdr12; 1037 sd-uhs-sdr25; 1038 sd-uhs-sdr50; 1039 sd-uhs-sdr104; 1040}; 1041 1042&spi1 { 1043 status = "okay"; 1044 max-freq = <48000000>; /* spi internal clk, don't modify */ 1045 spi_dev@0 { 1046 compatible = "rockchip,spidev"; 1047 reg = <0>; 1048 spi-max-frequency = <12000000>; 1049 spi-lsb-first; 1050 }; 1051}; 1052 1053&tcphy0 { 1054 status = "okay"; 1055 orientation-switch; 1056 port { 1057 #address-cells = <1>; 1058 #size-cells = <0>; 1059 tcphy0_orientation_switch: endpoint@0 { 1060 reg = <0>; 1061 remote-endpoint = <&usbc0_orien_sw>; 1062 }; 1063 }; 1064}; 1065 1066&tcphy1 { 1067 status = "okay"; 1068}; 1069 1070&tsadc { 1071 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ 1072 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ 1073 status = "okay"; 1074}; 1075 1076&u2phy0 { 1077 status = "okay"; 1078 1079 u2phy0_otg: otg-port { 1080 status = "okay"; 1081 }; 1082 1083 u2phy0_host: host-port { 1084 phy-supply = <&vcc5v0_usb>; 1085 status = "okay"; 1086 }; 1087}; 1088 1089&u2phy1 { 1090 status = "okay"; 1091 1092 u2phy1_otg: otg-port { 1093 status = "okay"; 1094 }; 1095 1096 u2phy1_host: host-port { 1097 phy-supply = <&vcc5v0_usb>; 1098 status = "okay"; 1099 }; 1100}; 1101 1102&uart0 { 1103 pinctrl-names = "default"; 1104 pinctrl-0 = <&uart0_xfer &uart0_cts>; 1105 status = "okay"; 1106}; 1107 1108&usb_host0_ehci { 1109 status = "okay"; 1110}; 1111 1112&usb_host1_ehci { 1113 status = "okay"; 1114}; 1115&usb_host0_ohci { 1116 status = "okay"; 1117}; 1118 1119&usb_host1_ohci { 1120 status = "okay"; 1121}; 1122 1123&usbdrd3_0 { 1124 status = "okay"; 1125}; 1126 1127&usbdrd3_1 { 1128 status = "okay"; 1129}; 1130 1131&usbdrd_dwc3_0 { 1132 status = "okay"; 1133 usb-role-switch; 1134 port { 1135 #address-cells = <1>; 1136 #size-cells = <0>; 1137 dwc3_0_role_switch: endpoint@0 { 1138 reg = <0>; 1139 remote-endpoint = <&usbc0_role_sw>; 1140 }; 1141 }; 1142}; 1143 1144&usbdrd_dwc3_1 { 1145 status = "okay"; 1146}; 1147 1148&vopb { 1149 status = "okay"; 1150}; 1151 1152&vopb_mmu { 1153 status = "okay"; 1154}; 1155 1156&vopl { 1157 status = "okay"; 1158}; 1159 1160&vopl_mmu { 1161 status = "okay"; 1162}; 1163 1164&pinctrl { 1165 pinctrl-names = "default"; 1166 pinctrl-0 = <&npu_ref_clk>; 1167 1168 bq2570 { 1169 charger_ok_int: charger-ok-int { 1170 rockchip,pins = 1171 <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; 1172 }; 1173 }; 1174 1175 camera { 1176 cam_pwren_high: cam-pwren-high { 1177 rockchip,pins = 1178 <4 RK_PC5 RK_FUNC_GPIO &pcfg_output_high>; 1179 }; 1180 }; 1181 1182 headphone { 1183 hp_det: hp-det { 1184 rockchip,pins = 1185 <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; 1186 }; 1187 }; 1188 1189 lcd_rst { 1190 lcd_rst_gpio: lcd-rst-gpio { 1191 rockchip,pins = 1192 <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 1193 }; 1194 }; 1195 1196 npu_clk { 1197 npu_ref_clk: npu-ref-clk { 1198 rockchip,pins = 1199 <0 RK_PA2 1 &pcfg_pull_none>; 1200 }; 1201 }; 1202 1203 pmic { 1204 pmic_int_l: pmic-int-l { 1205 rockchip,pins = 1206 <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; 1207 }; 1208 vsel1_gpio: vsel1-gpio { 1209 rockchip,pins = 1210 <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; 1211 }; 1212 vsel2_gpio: vsel2-gpio { 1213 rockchip,pins = 1214 <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; 1215 }; 1216 1217 soc_slppin_gpio: soc-slppin-gpio { 1218 rockchip,pins = 1219 <1 RK_PA5 RK_FUNC_GPIO &pcfg_output_low>; 1220 }; 1221 1222 soc_slppin_slp: soc-slppin-slp { 1223 rockchip,pins = 1224 <1 RK_PA5 1 &pcfg_pull_down>; 1225 }; 1226 1227 soc_slppin_rst: soc-slppin-rst { 1228 rockchip,pins = 1229 <1 RK_PA5 2 &pcfg_pull_none>; 1230 }; 1231 }; 1232 1233 sdio-pwrseq { 1234 wifi_enable_h: wifi-enable-h { 1235 rockchip,pins = 1236 <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; 1237 }; 1238 }; 1239 1240 sdmmc { 1241 sdmmc_bus1: sdmmc-bus1 { 1242 rockchip,pins = 1243 <4 RK_PB0 1 &pcfg_pull_up_10ma>; 1244 }; 1245 1246 sdmmc_bus4: sdmmc-bus4 { 1247 rockchip,pins = 1248 <4 RK_PB0 1 &pcfg_pull_up_10ma>, 1249 <4 RK_PB1 1 &pcfg_pull_up_10ma>, 1250 <4 RK_PB2 1 &pcfg_pull_up_10ma>, 1251 <4 RK_PB3 1 &pcfg_pull_up_10ma>; 1252 }; 1253 1254 sdmmc_clk: sdmmc-clk { 1255 rockchip,pins = 1256 <4 RK_PB4 1 &pcfg_pull_none_10ma>; 1257 }; 1258 1259 sdmmc_cmd: sdmmc-cmd { 1260 rockchip,pins = 1261 <4 RK_PB5 1 &pcfg_pull_up_10ma>; 1262 }; 1263 }; 1264 1265 tp_irq { 1266 tp_irq_gpio: tp-irq-gpio { 1267 rockchip,pins = 1268 <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; 1269 }; 1270 }; 1271 1272 usb-typec { 1273 usbc0_int: usbc0-int { 1274 rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; 1275 }; 1276 1277 vcc5v0_typec0_en: vcc5v0-typec0-en { 1278 rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 1279 }; 1280 }; 1281 1282 wireless-bluetooth { 1283 bt_irq_gpio: bt-irq-gpio { 1284 rockchip,pins = 1285 <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_down>; 1286 }; 1287 1288 uart0_gpios: uart0-gpios { 1289 rockchip,pins = 1290 <2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; 1291 }; 1292 }; 1293}; 1294 1295/* DON'T PUT ANYTHING BELOW HERE. PUT IT ABOVE PINCTRL */ 1296/* DON'T PUT ANYTHING BELOW HERE. PUT IT ABOVE PINCTRL */ 1297/* DON'T PUT ANYTHING BELOW HERE. PUT IT ABOVE PINCTRL */ 1298