1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2022 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7#include <dt-bindings/pwm/pwm.h> 8#include <dt-bindings/input/input.h> 9#include "rk3399.dtsi" 10#include "rk3399-android.dtsi" 11#include "rk3399-opp.dtsi" 12 13/ { 14 compatible = "rockchip,rk3399-box","rockchip,rk3399"; 15 16 vcc1v8_s0: vcc1v8-s0 { 17 compatible = "regulator-fixed"; 18 regulator-name = "vcc1v8_s0"; 19 regulator-min-microvolt = <1800000>; 20 regulator-max-microvolt = <1800000>; 21 regulator-always-on; 22 }; 23 24 vcc_sys: vcc-sys { 25 compatible = "regulator-fixed"; 26 regulator-name = "vcc_sys"; 27 regulator-min-microvolt = <5000000>; 28 regulator-max-microvolt = <5000000>; 29 regulator-always-on; 30 }; 31 32 vcc_phy: vcc-phy-regulator { 33 compatible = "regulator-fixed"; 34 regulator-name = "vcc_phy"; 35 regulator-always-on; 36 regulator-boot-on; 37 }; 38 39 vcc3v3_sys: vcc3v3-sys { 40 compatible = "regulator-fixed"; 41 regulator-name = "vcc3v3_sys"; 42 regulator-min-microvolt = <3300000>; 43 regulator-max-microvolt = <3300000>; 44 regulator-always-on; 45 vin-supply = <&vcc_sys>; 46 }; 47 48 vcc5v0_host: vcc5v0-host-regulator { 49 compatible = "regulator-fixed"; 50 enable-active-high; 51 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>; 52 pinctrl-names = "default"; 53 pinctrl-0 = <&host_vbus_drv>; 54 regulator-name = "vcc5v0_host"; 55 regulator-always-on; 56 }; 57 58 vdd_log: vdd-log { 59 compatible = "pwm-regulator"; 60 pwms = <&pwm2 0 25000 1>; 61 regulator-name = "vdd_log"; 62 regulator-min-microvolt = <800000>; 63 regulator-max-microvolt = <1400000>; 64 regulator-always-on; 65 regulator-boot-on; 66 67 /* for rockchip boot on */ 68 rockchip,pwm_id= <2>; 69 rockchip,pwm_voltage = <900000>; 70 71 vin-supply = <&vcc_sys>; 72 }; 73 74 xin32k: xin32k { 75 compatible = "fixed-clock"; 76 clock-frequency = <32768>; 77 clock-output-names = "xin32k"; 78 #clock-cells = <0>; 79 }; 80 81 clkin_gmac: external-gmac-clock { 82 compatible = "fixed-clock"; 83 clock-frequency = <125000000>; 84 clock-output-names = "clkin_gmac"; 85 #clock-cells = <0>; 86 }; 87 88 spdif-sound { 89 status = "okay"; 90 compatible = "simple-audio-card"; 91 simple-audio-card,name = "ROCKCHIP,SPDIF"; 92 simple-audio-card,mclk-fs = <128>; 93 simple-audio-card,cpu { 94 sound-dai = <&spdif>; 95 }; 96 simple-audio-card,codec { 97 sound-dai = <&spdif_out>; 98 }; 99 }; 100 101 spdif_out: spdif-out { 102 status = "okay"; 103 compatible = "linux,spdif-dit"; 104 #sound-dai-cells = <0>; 105 }; 106 107 sdio_pwrseq: sdio-pwrseq { 108 compatible = "mmc-pwrseq-simple"; 109 clocks = <&rk808 1>; 110 clock-names = "ext_clock"; 111 pinctrl-names = "default"; 112 pinctrl-0 = <&wifi_enable_h>; 113 114 /* 115 * On the module itself this is one of these (depending 116 * on the actual card populated): 117 * - SDIO_RESET_L_WL_REG_ON 118 * - PDN (power down when low) 119 */ 120 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; 121 }; 122 123 wireless-wlan { 124 compatible = "wlan-platdata"; 125 rockchip,grf = <&grf>; 126 wifi_chip_type = "ap6354"; 127 sdio_vref = <1800>; 128 WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; 129 status = "okay"; 130 }; 131 132 wireless-bluetooth { 133 compatible = "bluetooth-platdata"; 134 clocks = <&rk808 1>; 135 clock-names = "ext_clock"; 136 /* wifi-bt-power-toggle; */ 137 uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; 138 pinctrl-names = "default", "rts_gpio"; 139 pinctrl-0 = <&uart0_rts>; 140 pinctrl-1 = <&uart0_gpios>; 141 /* BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; */ 142 BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; 143 BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; 144 BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; 145 status = "okay"; 146 }; 147 148 test-power { 149 status = "okay"; 150 }; 151}; 152 153&hdmi_dp_sound { 154 status = "okay"; 155}; 156 157&hdmi { 158 pinctrl-names = "default"; 159 pinctrl-0 = <&hdmi_i2c_xfer>, <&hdmi_cec>; 160}; 161 162&sdmmc { 163 clock-frequency = <100000000>; 164 clock-freq-min-max = <100000 100000000>; 165 no-sdio; 166 no-mmc; 167 bus-width = <4>; 168 cap-mmc-highspeed; 169 cap-sd-highspeed; 170 disable-wp; 171 num-slots = <1>; 172 //sd-uhs-sdr104; 173 vqmmc-supply = <&vcc_sd>; 174 pinctrl-names = "default"; 175 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; 176 card-detect-delay = <800>; 177 status = "okay"; 178}; 179 180&sdio0 { 181 clock-frequency = <100000000>; 182 clock-freq-min-max = <200000 100000000>; 183 no-sd; 184 no-mmc; 185 bus-width = <4>; 186 disable-wp; 187 cap-sd-highspeed; 188 cap-sdio-irq; 189 keep-power-in-suspend; 190 mmc-pwrseq = <&sdio_pwrseq>; 191 non-removable; 192 num-slots = <1>; 193 pinctrl-names = "default"; 194 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; 195 sd-uhs-sdr104; 196 status = "okay"; 197}; 198 199&emmc_phy { 200 status = "okay"; 201}; 202 203&sdhci { 204 bus-width = <8>; 205 mmc-hs400-1_8v; 206 no-sdio; 207 no-sd; 208 non-removable; 209 mmc-hs400-enhanced-strobe; 210 status = "okay"; 211}; 212 213&i2s0 { 214 status = "okay"; 215 rockchip,i2s-broken-burst-len; 216 rockchip,playback-channels = <8>; 217 rockchip,capture-channels = <8>; 218 #sound-dai-cells = <0>; 219}; 220 221&i2s2 { 222 #sound-dai-cells = <0>; 223}; 224 225&spdif { 226 pinctrl-0 = <&spdif_bus_1>; 227 status = "okay"; 228 #sound-dai-cells = <0>; 229}; 230 231&i2c0 { 232 status = "okay"; 233 i2c-scl-rising-time-ns = <168>; 234 i2c-scl-falling-time-ns = <4>; 235 clock-frequency = <400000>; 236 237 vdd_cpu_b: syr827@40 { 238 compatible = "silergy,syr827"; 239 reg = <0x40>; 240 regulator-compatible = "fan53555-reg"; 241 pinctrl-0 = <&vsel1_gpio>; 242 vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; 243 regulator-name = "vdd_cpu_b"; 244 regulator-min-microvolt = <712500>; 245 regulator-max-microvolt = <1500000>; 246 regulator-ramp-delay = <1000>; 247 fcs,suspend-voltage-selector = <1>; 248 regulator-always-on; 249 regulator-boot-on; 250 vin-supply = <&vcc_sys>; 251 regulator-state-mem { 252 regulator-off-in-suspend; 253 }; 254 }; 255 256 vdd_gpu: syr828@41 { 257 compatible = "silergy,syr828"; 258 reg = <0x41>; 259 regulator-compatible = "fan53555-reg"; 260 pinctrl-0 = <&vsel2_gpio>; 261 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; 262 regulator-name = "vdd_gpu"; 263 regulator-min-microvolt = <712500>; 264 regulator-max-microvolt = <1500000>; 265 regulator-ramp-delay = <1000>; 266 fcs,suspend-voltage-selector = <1>; 267 regulator-always-on; 268 regulator-boot-on; 269 vin-supply = <&vcc_sys>; 270 regulator-initial-mode = <1>; /* 1:force PWM 2:auto */ 271 regulator-state-mem { 272 regulator-off-in-suspend; 273 }; 274 }; 275 276 rk808: pmic@1b { 277 compatible = "rockchip,rk808"; 278 reg = <0x1b>; 279 interrupt-parent = <&gpio1>; 280 interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 281 pinctrl-names = "default"; 282 pinctrl-0 = <&pmic_int_l>; 283 rockchip,system-power-controller; 284 wakeup-source; 285 #clock-cells = <1>; 286 clock-output-names = "rk808-clkout1", "rk808-clkout2"; 287 288 vcc1-supply = <&vcc_sys>; 289 vcc2-supply = <&vcc_sys>; 290 vcc3-supply = <&vcc_sys>; 291 vcc4-supply = <&vcc_sys>; 292 vcc6-supply = <&vcc_sys>; 293 vcc7-supply = <&vcc_sys>; 294 vcc8-supply = <&vcc3v3_sys>; 295 vcc9-supply = <&vcc_sys>; 296 vcc10-supply = <&vcc_sys>; 297 vcc11-supply = <&vcc_sys>; 298 vcc12-supply = <&vcc3v3_sys>; 299 vddio-supply = <&vcc_1v8>; 300 301 regulators { 302 vdd_center: DCDC_REG1 { 303 regulator-name = "vdd_center"; 304 regulator-min-microvolt = <750000>; 305 regulator-max-microvolt = <1350000>; 306 regulator-ramp-delay = <6001>; 307 regulator-always-on; 308 regulator-boot-on; 309 regulator-state-mem { 310 regulator-off-in-suspend; 311 }; 312 }; 313 314 vdd_cpu_l: DCDC_REG2 { 315 regulator-name = "vdd_cpu_l"; 316 regulator-min-microvolt = <750000>; 317 regulator-max-microvolt = <1350000>; 318 regulator-ramp-delay = <6001>; 319 regulator-always-on; 320 regulator-boot-on; 321 regulator-state-mem { 322 regulator-off-in-suspend; 323 }; 324 }; 325 326 vcc_ddr: DCDC_REG3 { 327 regulator-name = "vcc_ddr"; 328 regulator-always-on; 329 regulator-boot-on; 330 regulator-state-mem { 331 regulator-on-in-suspend; 332 }; 333 }; 334 335 vcc_1v8: DCDC_REG4 { 336 regulator-name = "vcc_1v8"; 337 regulator-min-microvolt = <1800000>; 338 regulator-max-microvolt = <1800000>; 339 regulator-always-on; 340 regulator-boot-on; 341 regulator-state-mem { 342 regulator-on-in-suspend; 343 regulator-suspend-microvolt = <1800000>; 344 }; 345 }; 346 347 vcc1v8_dvp: LDO_REG1 { 348 regulator-name = "vcc1v8_dvp"; 349 regulator-min-microvolt = <1800000>; 350 regulator-max-microvolt = <1800000>; 351 regulator-always-on; 352 regulator-boot-on; 353 regulator-state-mem { 354 regulator-on-in-suspend; 355 regulator-suspend-microvolt = <1800000>; 356 }; 357 }; 358 359 vcca1v8_hdmi: LDO_REG2 { 360 regulator-name = "vcca1v8_hdmi"; 361 regulator-min-microvolt = <1800000>; 362 regulator-max-microvolt = <1800000>; 363 regulator-always-on; 364 regulator-boot-on; 365 regulator-state-mem { 366 regulator-on-in-suspend; 367 regulator-suspend-microvolt = <1800000>; 368 }; 369 }; 370 371 vcca_1v8: LDO_REG3 { 372 regulator-name = "vcca_1v8"; 373 regulator-min-microvolt = <1800000>; 374 regulator-max-microvolt = <1800000>; 375 regulator-always-on; 376 regulator-boot-on; 377 regulator-state-mem { 378 regulator-on-in-suspend; 379 regulator-suspend-microvolt = <1800000>; 380 }; 381 }; 382 383 vcc_sd: LDO_REG4 { 384 regulator-name = "vcc_sd"; 385 regulator-min-microvolt = <1800000>; 386 regulator-max-microvolt = <3000000>; 387 regulator-always-on; 388 regulator-boot-on; 389 regulator-state-mem { 390 regulator-on-in-suspend; 391 regulator-suspend-microvolt = <3000000>; 392 }; 393 }; 394 395 vcc3v0_sd: LDO_REG5 { 396 regulator-name = "vcc3v0_sd"; 397 regulator-min-microvolt = <3000000>; 398 regulator-max-microvolt = <3000000>; 399 regulator-always-on; 400 regulator-boot-on; 401 regulator-state-mem { 402 regulator-on-in-suspend; 403 regulator-suspend-microvolt = <3000000>; 404 }; 405 }; 406 407 vcc_1v5: LDO_REG6 { 408 regulator-name = "vcc_1v5"; 409 regulator-min-microvolt = <1500000>; 410 regulator-max-microvolt = <1500000>; 411 regulator-always-on; 412 regulator-boot-on; 413 regulator-state-mem { 414 regulator-on-in-suspend; 415 regulator-suspend-microvolt = <1500000>; 416 }; 417 }; 418 419 vcca0v9_hdmi: LDO_REG7 { 420 regulator-name = "vcca0v9_hdmi"; 421 regulator-min-microvolt = <900000>; 422 regulator-max-microvolt = <900000>; 423 regulator-always-on; 424 regulator-boot-on; 425 regulator-state-mem { 426 regulator-on-in-suspend; 427 regulator-suspend-microvolt = <900000>; 428 }; 429 }; 430 431 vcc_3v0: LDO_REG8 { 432 regulator-name = "vcc_3v0"; 433 regulator-min-microvolt = <3000000>; 434 regulator-max-microvolt = <3000000>; 435 regulator-always-on; 436 regulator-boot-on; 437 regulator-state-mem { 438 regulator-on-in-suspend; 439 regulator-suspend-microvolt = <3000000>; 440 }; 441 }; 442 443 vcc3v3_s3: SWITCH_REG1 { 444 regulator-name = "vcc3v3_s3"; 445 regulator-always-on; 446 regulator-boot-on; 447 regulator-state-mem { 448 regulator-on-in-suspend; 449 }; 450 }; 451 452 vcc3v3_s0: SWITCH_REG2 { 453 regulator-name = "vcc3v3_s0"; 454 regulator-always-on; 455 regulator-boot-on; 456 regulator-state-mem { 457 regulator-on-in-suspend; 458 }; 459 }; 460 }; 461 }; 462}; 463 464&cpu_l0 { 465 cpu-supply = <&vdd_cpu_l>; 466}; 467 468&cpu_l1 { 469 cpu-supply = <&vdd_cpu_l>; 470}; 471 472&cpu_l2 { 473 cpu-supply = <&vdd_cpu_l>; 474}; 475 476&cpu_l3 { 477 cpu-supply = <&vdd_cpu_l>; 478}; 479 480&cpu_b0 { 481 cpu-supply = <&vdd_cpu_b>; 482}; 483 484&cpu_b1 { 485 cpu-supply = <&vdd_cpu_b>; 486}; 487 488&firmware_android { 489 compatible = "android,firmware"; 490 fstab { 491 compatible = "android,fstab"; 492 system { 493 compatible = "android,system"; 494 dev = "/dev/block/by-name/system"; 495 type = "ext4"; 496 mnt_flags = "ro,barrier=1,inode_readahead_blks=8"; 497 fsmgr_flags = "wait,verify"; 498 }; 499 vendor { 500 compatible = "android,vendor"; 501 dev = "/dev/block/by-name/vendor"; 502 type = "ext4"; 503 mnt_flags = "ro,barrier=1,inode_readahead_blks=8"; 504 fsmgr_flags = "wait,verify"; 505 }; 506 }; 507}; 508 509&gpu { 510 status = "okay"; 511 mali-supply = <&vdd_gpu>; 512}; 513 514&threshold { 515 temperature = <85000>; 516}; 517 518&target { 519 temperature = <100000>; 520}; 521 522&soc_crit { 523 temperature = <115000>; 524}; 525 526&tcphy0 { 527 extcon = <&fusb0>; 528 status = "okay"; 529}; 530 531&tcphy1 { 532 status = "okay"; 533}; 534 535&tsadc { 536 /* tshut mode 0:CRU 1:GPIO */ 537 rockchip,hw-tshut-mode = <1>; 538 /* tshut polarity 0:LOW 1:HIGH */ 539 rockchip,hw-tshut-polarity = <1>; 540 rockchip,hw-tshut-temp = <120000>; 541 status = "okay"; 542}; 543 544&u2phy0 { 545 status = "okay"; 546 extcon = <&fusb0>; 547 548 u2phy0_otg: otg-port { 549 status = "okay"; 550 }; 551 552 u2phy0_host: host-port { 553 phy-supply = <&vcc5v0_host>; 554 status = "okay"; 555 }; 556}; 557 558&u2phy1 { 559 status = "okay"; 560 561 u2phy1_otg: otg-port { 562 status = "okay"; 563 }; 564 565 u2phy1_host: host-port { 566 phy-supply = <&vcc5v0_host>; 567 status = "okay"; 568 }; 569}; 570 571&uart0 { 572 pinctrl-names = "default"; 573 pinctrl-0 = <&uart0_xfer &uart0_cts>; 574 status = "okay"; 575}; 576 577&uart2 { 578 status = "okay"; 579}; 580 581&usb_host0_ehci { 582 status = "okay"; 583}; 584 585&usb_host0_ohci { 586 status = "okay"; 587}; 588 589&usb_host1_ehci { 590 status = "okay"; 591}; 592 593&usb_host1_ohci { 594 status = "okay"; 595}; 596 597&usbdrd3_0 { 598 status = "okay"; 599}; 600 601&usbdrd_dwc3_0 { 602 dr_mode = "otg"; 603 status = "okay"; 604 extcon = <&fusb0>; 605}; 606 607&usbdrd3_1 { 608 status = "okay"; 609}; 610 611&usbdrd_dwc3_1 { 612 dr_mode = "host"; 613 status = "okay"; 614}; 615 616&pwm2 { 617 status = "okay"; 618 pinctrl-names = "active"; 619 pinctrl-0 = <&pwm2_pin_pull_down>; 620}; 621 622&pwm3 { 623 status = "okay"; 624 625 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH 0>; 626 compatible = "rockchip,remotectl-pwm"; 627 remote_pwm_id = <3>; 628 handle_cpu_id = <1>; 629 remote_support_psci = <1>; 630 631 ir_key1 { 632 rockchip,usercode = <0x4040>; 633 rockchip,key_table = 634 <0xf2 KEY_REPLY>, 635 <0xba KEY_BACK>, 636 <0xf4 KEY_UP>, 637 <0xf1 KEY_DOWN>, 638 <0xef KEY_LEFT>, 639 <0xee KEY_RIGHT>, 640 <0xbd KEY_HOME>, 641 <0xea KEY_VOLUMEUP>, 642 <0xe3 KEY_VOLUMEDOWN>, 643 <0xe2 KEY_SEARCH>, 644 <0xb2 KEY_POWER>, 645 <0xbc KEY_MUTE>, 646 <0xec KEY_MENU>, 647 <0xbf 0x190>, 648 <0xe0 0x191>, 649 <0xe1 0x192>, 650 <0xe9 183>, 651 <0xe6 248>, 652 <0xe8 185>, 653 <0xe7 186>, 654 <0xf0 388>, 655 <0xbe 0x175>; 656 }; 657 658 ir_key2 { 659 rockchip,usercode = <0xff00>; 660 rockchip,key_table = 661 <0xf9 KEY_HOME>, 662 <0xbf KEY_BACK>, 663 <0xfb KEY_MENU>, 664 <0xaa KEY_REPLY>, 665 <0xb9 KEY_UP>, 666 <0xe9 KEY_DOWN>, 667 <0xb8 KEY_LEFT>, 668 <0xea KEY_RIGHT>, 669 <0xeb KEY_VOLUMEDOWN>, 670 <0xef KEY_VOLUMEUP>, 671 <0xf7 KEY_MUTE>, 672 <0xe7 KEY_POWER>, 673 <0xfc KEY_POWER>, 674 <0xa9 KEY_VOLUMEDOWN>, 675 <0xa8 KEY_VOLUMEDOWN>, 676 <0xe0 KEY_VOLUMEDOWN>, 677 <0xa5 KEY_VOLUMEDOWN>, 678 <0xab 183>, 679 <0xb7 388>, 680 <0xe8 388>, 681 <0xf8 184>, 682 <0xaf 185>, 683 <0xed KEY_VOLUMEDOWN>, 684 <0xee 186>, 685 <0xb3 KEY_VOLUMEDOWN>, 686 <0xf1 KEY_VOLUMEDOWN>, 687 <0xf2 KEY_VOLUMEDOWN>, 688 <0xf3 KEY_SEARCH>, 689 <0xb4 KEY_VOLUMEDOWN>, 690 <0xbe KEY_SEARCH>; 691 }; 692 693 ir_key3 { 694 rockchip,usercode = <0x1dcc>; 695 rockchip,key_table = 696 <0xee KEY_REPLY>, 697 <0xf0 KEY_BACK>, 698 <0xf8 KEY_UP>, 699 <0xbb KEY_DOWN>, 700 <0xef KEY_LEFT>, 701 <0xed KEY_RIGHT>, 702 <0xfc KEY_HOME>, 703 <0xf1 KEY_VOLUMEUP>, 704 <0xfd KEY_VOLUMEDOWN>, 705 <0xb7 KEY_SEARCH>, 706 <0xff KEY_POWER>, 707 <0xf3 KEY_MUTE>, 708 <0xbf KEY_MENU>, 709 <0xf9 0x191>, 710 <0xf5 0x192>, 711 <0xb3 388>, 712 <0xbe KEY_1>, 713 <0xba KEY_2>, 714 <0xb2 KEY_3>, 715 <0xbd KEY_4>, 716 <0xf9 KEY_5>, 717 <0xb1 KEY_6>, 718 <0xfc KEY_7>, 719 <0xf8 KEY_8>, 720 <0xb0 KEY_9>, 721 <0xb6 KEY_0>, 722 <0xb5 KEY_BACKSPACE>; 723 }; 724}; 725 726&gmac { 727 phy-supply = <&vcc_phy>; 728 phy-mode = "rgmii"; 729 clock_in_out = "input"; 730 snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>; 731 snps,reset-active-low; 732 snps,reset-delays-us = <0 10000 50000>; 733 assigned-clocks = <&cru SCLK_RMII_SRC>; 734 assigned-clock-parents = <&clkin_gmac>; 735 pinctrl-names = "default", "sleep"; 736 pinctrl-0 = <&rgmii_pins>; 737 pinctrl-1 = <&rgmii_sleep_pins>; 738 tx_delay = <0x28>; 739 rx_delay = <0x11>; 740 status = "okay"; 741}; 742 743&saradc { 744 status = "okay"; 745}; 746 747&i2s2 { 748 status = "okay"; 749}; 750 751&io_domains { 752 status = "okay"; 753 754 bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */ 755 audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */ 756 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */ 757 gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */ 758}; 759 760&pinctrl { 761 sdio-pwrseq { 762 wifi_enable_h: wifi-enable-h { 763 rockchip,pins = 764 <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 765 }; 766 }; 767 768 wireless-bluetooth { 769 uart0_gpios: uart0-gpios { 770 rockchip,pins = 771 <2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; 772 }; 773 }; 774 775 usb2 { 776 host_vbus_drv: host-vbus-drv { 777 rockchip,pins = 778 <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 779 }; 780 }; 781 782 pmic { 783 pmic_int_l: pmic-int-l { 784 rockchip,pins = 785 <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; 786 }; 787 788 vsel1_gpio: vsel1-gpio { 789 rockchip,pins = 790 <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; 791 }; 792 793 vsel2_gpio: vsel2-gpio { 794 rockchip,pins = 795 <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; 796 }; 797 }; 798 799 gmac { 800 rgmii_sleep_pins: rgmii-sleep-pins { 801 rockchip,pins = 802 <3 RK_PB7 RK_FUNC_GPIO &pcfg_output_low>; 803 }; 804 }; 805}; 806 807&pvtm { 808 status = "okay"; 809}; 810 811&pmu_pvtm { 812 status = "okay"; 813}; 814 815&pmu_io_domains { 816 status = "okay"; 817 pmu1830-supply = <&vcc_1v8>; 818}; 819 820&rockchip_suspend { 821 status = "okay"; 822 rockchip,sleep-debug-en = <0>; 823 rockchip,sleep-mode-config = < 824 (0 825 | RKPM_SLP_ARMPD 826 | RKPM_SLP_PERILPPD 827 | RKPM_SLP_DDR_RET 828 | RKPM_SLP_PLLPD 829 | RKPM_SLP_CENTER_PD 830 | RKPM_SLP_AP_PWROFF 831 ) 832 >; 833 rockchip,wakeup-config = < 834 (0 835 | RKPM_GPIO_WKUP_EN 836 | RKPM_PWM_WKUP_EN 837 ) 838 >; 839 rockchip,pwm-regulator-config = < 840 (0 841 | PWM2_REGULATOR_EN 842 ) 843 >; 844 rockchip,power-ctrl = 845 <&gpio1 17 GPIO_ACTIVE_HIGH>, 846 <&gpio1 14 GPIO_ACTIVE_HIGH>; 847}; 848 849&vopb { 850 assigned-clocks = <&cru DCLK_VOP0_DIV>; 851 assigned-clock-parents = <&cru PLL_VPLL>; 852}; 853 854&vopl { 855 assigned-clocks = <&cru DCLK_VOP1_DIV>; 856 assigned-clock-parents = <&cru PLL_CPLL>; 857}; 858