1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd 4 */ 5 6#include <dt-bindings/display/drm_mipi_dsi.h> 7#include <dt-bindings/gpio/gpio.h> 8#include <dt-bindings/input/input.h> 9#include <dt-bindings/pinctrl/rockchip.h> 10#include <dt-bindings/sensor-dev.h> 11 12/ { 13 adc-keys { 14 compatible = "adc-keys"; 15 io-channels = <&saradc 2>; 16 io-channel-names = "buttons"; 17 poll-interval = <100>; 18 keyup-threshold-microvolt = <1800000>; 19 20 esc-key { 21 linux,code = <KEY_ESC>; 22 label = "esc"; 23 press-threshold-microvolt = <1310000>; 24 }; 25 26 home-key { 27 linux,code = <KEY_HOME>; 28 label = "home"; 29 press-threshold-microvolt = <624000>; 30 }; 31 32 menu-key { 33 linux,code = <KEY_MENU>; 34 label = "menu"; 35 press-threshold-microvolt = <987000>; 36 }; 37 38 vol-down-key { 39 linux,code = <KEY_VOLUMEDOWN>; 40 label = "volume down"; 41 press-threshold-microvolt = <300000>; 42 }; 43 44 vol-up-key { 45 linux,code = <KEY_VOLUMEUP>; 46 label = "volume up"; 47 press-threshold-microvolt = <17000>; 48 }; 49 }; 50 51 backlight: backlight { 52 compatible = "pwm-backlight"; 53 pwms = <&pwm1 0 25000 0>; 54 brightness-levels = < 55 0 1 2 3 4 5 6 7 56 8 9 10 11 12 13 14 15 57 16 17 18 19 20 21 22 23 58 24 25 26 27 28 29 30 31 59 32 33 34 35 36 37 38 39 60 40 41 42 43 44 45 46 47 61 48 49 50 51 52 53 54 55 62 56 57 58 59 60 61 62 63 63 64 65 66 67 68 69 70 71 64 72 73 74 75 76 77 78 79 65 80 81 82 83 84 85 86 87 66 88 89 90 91 92 93 94 95 67 96 97 98 99 100 101 102 103 68 104 105 106 107 108 109 110 111 69 112 113 114 115 116 117 118 119 70 120 121 122 123 124 125 126 127 71 128 129 130 131 132 133 134 135 72 136 137 138 139 140 141 142 143 73 144 145 146 147 148 149 150 151 74 152 153 154 155 156 157 158 159 75 160 161 162 163 164 165 166 167 76 168 169 170 171 172 173 174 175 77 176 177 178 179 180 181 182 183 78 184 185 186 187 188 189 190 191 79 192 193 194 195 196 197 198 199 80 200 201 202 203 204 205 206 207 81 208 209 210 211 212 213 214 215 82 216 217 218 219 220 221 222 223 83 224 225 226 227 228 229 230 231 84 232 233 234 235 236 237 238 239 85 240 241 242 243 244 245 246 247 86 248 249 250 251 252 253 254 255>; 87 default-brightness-level = <200>; 88 }; 89 90 rk817-sound { 91 compatible = "rockchip,multicodecs-card"; 92 rockchip,card-name = "rockchip-rk817"; 93 hp-det-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>; 94 io-channels = <&saradc 1>; 95 io-channel-names = "adc-detect"; 96 keyup-threshold-microvolt = <1800000>; 97 poll-interval = <100>; 98 rockchip,format = "i2s"; 99 rockchip,mclk-fs = <256>; 100 rockchip,cpu = <&i2s1_2ch>; 101 rockchip,codec = <&rk817_codec>; 102 pinctrl-names = "default"; 103 pinctrl-0 = <&hp_det>; 104 play-pause-key { 105 label = "playpause"; 106 linux,code = <KEY_PLAYPAUSE>; 107 press-threshold-microvolt = <2000>; 108 }; 109 }; 110 111 sdio_pwrseq: sdio-pwrseq { 112 compatible = "mmc-pwrseq-simple"; 113 /*clocks = <&rk817 1>;*/ 114 /*clock-names = "ext_clock";*/ 115 pinctrl-names = "default"; 116 pinctrl-0 = <&wifi_enable_h>; 117 118 /* 119 * On the module itself this is one of these (depending 120 * on the actual card populated): 121 * - SDIO_RESET_L_WL_REG_ON 122 * - PDN (power down when low) 123 */ 124 reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; /* GPIO3_A4 */ 125 }; 126 127 test-power { 128 status = "okay"; 129 }; 130 131 vccsys: vccsys { 132 compatible = "regulator-fixed"; 133 regulator-name = "vcc3v8_sys"; 134 regulator-always-on; 135 regulator-boot-on; 136 regulator-min-microvolt = <3800000>; 137 regulator-max-microvolt = <3800000>; 138 }; 139 140 wireless-wlan { 141 compatible = "wlan-platdata"; 142 wifi_chip_type = "AP6210"; 143 WIFI,host_wake_irq = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>; 144 WIFI,poweren_gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; 145 status = "okay"; 146 }; 147 148 wireless-bluetooth { 149 compatible = "bluetooth-platdata"; 150 clocks = <&rk817 1>; 151 clock-names = "ext_clock"; 152 uart_rts_gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_LOW>; 153 pinctrl-names = "default","rts_gpio"; 154 pinctrl-0 = <&uart1_rts>; 155 pinctrl-1 = <&uart1_rts_gpio>; 156 BT,reset_gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; 157 BT,wake_gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; 158 BT,wake_host_irq = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; 159 status = "okay"; 160 }; 161 162 vcc18_lcd_n: vcc18-lcd-n { 163 compatible = "regulator-fixed"; 164 regulator-name = "vcc18_lcd_n"; 165 regulator-boot-on; 166 gpio = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; 167 enable-active-high; 168 regulator-state-mem { 169 regulator-off-in-suspend; 170 }; 171 }; 172}; 173 174&bus_apll { 175 bus-supply = <&vdd_logic>; 176 status = "okay"; 177}; 178 179&cpu0 { 180 cpu-supply = <&vdd_arm>; 181}; 182 183&display_subsystem { 184 status = "okay"; 185}; 186 187&dsi { 188 status = "okay"; 189 190 panel@0 { 191 compatible = "sitronix,st7703", "simple-panel-dsi"; 192 reg = <0>; 193 backlight = <&backlight>; 194 power-supply = <&vcc18_lcd_n>; 195 prepare-delay-ms = <2>; 196 reset-delay-ms = <1>; 197 init-delay-ms = <20>; 198 enable-delay-ms = <120>; 199 disable-delay-ms = <50>; 200 unprepare-delay-ms = <20>; 201 202 width-mm = <68>; 203 height-mm = <121>; 204 205 dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 206 MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; 207 dsi,format = <MIPI_DSI_FMT_RGB888>; 208 dsi,lanes = <4>; 209 210 panel-init-sequence = [ 211 05 fa 01 11 212 39 00 04 b9 f1 12 83 213 39 00 1c ba 33 81 05 f9 0e 0e 00 00 00 214 00 00 00 00 00 44 25 00 91 0a 215 00 00 02 4f 01 00 00 37 216 15 00 02 b8 25 217 39 00 04 bf 02 11 00 218 39 00 0b b3 0c 10 0a 50 03 ff 00 00 00 219 00 220 39 00 0a c0 73 73 50 50 00 00 08 70 00 221 15 00 02 bc 46 222 15 00 02 cc 0b 223 15 00 02 b4 80 224 39 00 04 b2 c8 12 30 225 39 00 0f e3 07 07 0b 0b 03 0b 00 00 00 226 00 ff 00 c0 10 227 39 00 0d c1 53 00 1e 1e 77 e1 cc dd 67 228 77 33 33 229 39 00 07 c6 00 00 ff ff 01 ff 230 39 00 03 b5 09 09 231 39 00 03 b6 87 95 232 39 00 40 e9 c2 10 05 05 10 05 a0 12 31 233 23 3f 81 0a a0 37 18 00 80 01 234 00 00 00 00 80 01 00 00 00 48 235 f8 86 42 08 88 88 80 88 88 88 236 58 f8 87 53 18 88 88 81 88 88 237 88 00 00 00 01 00 00 00 00 00 238 00 00 00 00 239 39 00 3e ea 00 1a 00 00 00 00 02 00 00 240 00 00 00 1f 88 81 35 78 88 88 241 85 88 88 88 0f 88 80 24 68 88 242 88 84 88 88 88 23 10 00 00 1c 243 00 00 00 00 00 00 00 00 00 00 244 00 00 00 00 00 30 05 a0 00 00 245 00 00 246 39 00 23 e0 00 06 08 2a 31 3f 38 36 07 247 0c 0d 11 13 12 13 11 18 00 06 248 08 2a 31 3f 38 36 07 0c 0d 11 249 13 12 13 11 18 250 05 32 01 29 251 ]; 252 253 panel-exit-sequence = [ 254 05 00 01 28 255 05 00 01 10 256 ]; 257 258 display-timings { 259 native-mode = <&timing0>; 260 261 timing0: timing0 { 262 clock-frequency = <66000000>; 263 hactive = <720>; 264 vactive = <1280>; 265 hfront-porch = <40>; 266 hsync-len = <10>; 267 hback-porch = <40>; 268 vfront-porch = <22>; 269 vsync-len = <4>; 270 vback-porch = <11>; 271 hsync-active = <0>; 272 vsync-active = <0>; 273 de-active = <0>; 274 pixelclk-active = <0>; 275 }; 276 }; 277 278 ports { 279 #address-cells = <1>; 280 #size-cells = <0>; 281 282 port@0 { 283 reg = <0>; 284 panel_in_dsi: endpoint { 285 remote-endpoint = <&dsi_out_panel>; 286 }; 287 }; 288 }; 289 }; 290 291 ports { 292 #address-cells = <1>; 293 #size-cells = <0>; 294 295 port@1 { 296 reg = <1>; 297 dsi_out_panel: endpoint { 298 remote-endpoint = <&panel_in_dsi>; 299 }; 300 }; 301 }; 302}; 303 304&dsi_in_vopb { 305 status = "okay"; 306}; 307 308&route_dsi { 309 connect = <&vopb_out_dsi>; 310 status = "okay"; 311}; 312 313&dfi { 314 status = "okay"; 315}; 316 317&dmc { 318 center-supply = <&vdd_logic>; 319 status = "okay"; 320}; 321 322&emmc { 323 bus-width = <8>; 324 cap-mmc-highspeed; 325 mmc-hs200-1_8v; 326 no-sdio; 327 no-sd; 328 disable-wp; 329 non-removable; 330 num-slots = <1>; 331 status = "okay"; 332}; 333 334&gpu { 335 mali-supply = <&vdd_logic>; 336 status = "okay"; 337}; 338 339&i2c0 { 340 status = "okay"; 341 clock-frequency = <400000>; 342 i2c-scl-rising-time-ns = <280>; 343 i2c-scl-falling-time-ns = <16>; 344 345 rk817: pmic@20 { 346 compatible = "rockchip,rk817"; 347 reg = <0x20>; 348 interrupt-parent = <&gpio0>; 349 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 350 pinctrl-names = "default", "pmic-sleep", 351 "pmic-power-off", "pmic-reset"; 352 pinctrl-0 = <&pmic_int>; 353 pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; 354 pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; 355 pinctrl-3 = <&soc_slppin_rst>, <&rk817_slppin_rst>; 356 rockchip,system-power-controller; 357 wakeup-source; 358 #clock-cells = <1>; 359 clock-output-names = "rk808-clkout1", "rk808-clkout2"; 360 //fb-inner-reg-idxs = <2>; 361 /* 1: rst regs (default in codes), 0: rst the pmic */ 362 pmic-reset-func = <1>; 363 364 vcc1-supply = <&vccsys>; 365 vcc2-supply = <&vccsys>; 366 vcc3-supply = <&vccsys>; 367 vcc4-supply = <&vccsys>; 368 vcc5-supply = <&vccsys>; 369 vcc6-supply = <&vccsys>; 370 vcc7-supply = <&vcc_3v0>; 371 vcc8-supply = <&vccsys>; 372 vcc9-supply = <&dcdc_boost>; 373 374 pwrkey { 375 status = "okay"; 376 }; 377 378 pinctrl_rk8xx: pinctrl_rk8xx { 379 gpio-controller; 380 #gpio-cells = <2>; 381 382 rk817_ts_gpio1: rk817_ts_gpio1 { 383 pins = "gpio_ts"; 384 function = "pin_fun1"; 385 /* output-low; */ 386 /* input-enable; */ 387 }; 388 389 rk817_gt_gpio2: rk817_gt_gpio2 { 390 pins = "gpio_gt"; 391 function = "pin_fun1"; 392 }; 393 394 rk817_pin_ts: rk817_pin_ts { 395 pins = "gpio_ts"; 396 function = "pin_fun0"; 397 }; 398 399 rk817_pin_gt: rk817_pin_gt { 400 pins = "gpio_gt"; 401 function = "pin_fun0"; 402 }; 403 404 rk817_slppin_null: rk817_slppin_null { 405 pins = "gpio_slp"; 406 function = "pin_fun0"; 407 }; 408 409 rk817_slppin_slp: rk817_slppin_slp { 410 pins = "gpio_slp"; 411 function = "pin_fun1"; 412 }; 413 414 rk817_slppin_pwrdn: rk817_slppin_pwrdn { 415 pins = "gpio_slp"; 416 function = "pin_fun2"; 417 }; 418 419 rk817_slppin_rst: rk817_slppin_rst { 420 pins = "gpio_slp"; 421 function = "pin_fun3"; 422 }; 423 }; 424 425 regulators { 426 vdd_logic: DCDC_REG1 { 427 regulator-always-on; 428 regulator-boot-on; 429 regulator-min-microvolt = <850000>; 430 regulator-max-microvolt = <1350000>; 431 regulator-ramp-delay = <6001>; 432 regulator-initial-mode = <0x2>; 433 regulator-name = "vdd_logic"; 434 regulator-state-mem { 435 regulator-on-in-suspend; 436 regulator-suspend-microvolt = <950000>; 437 }; 438 }; 439 440 vdd_arm: DCDC_REG2 { 441 regulator-always-on; 442 regulator-boot-on; 443 regulator-min-microvolt = <850000>; 444 regulator-max-microvolt = <1350000>; 445 regulator-ramp-delay = <6001>; 446 regulator-initial-mode = <0x2>; 447 regulator-name = "vdd_arm"; 448 regulator-state-mem { 449 regulator-off-in-suspend; 450 regulator-suspend-microvolt = <950000>; 451 }; 452 }; 453 454 vcc_ddr: DCDC_REG3 { 455 regulator-always-on; 456 regulator-boot-on; 457 regulator-initial-mode = <0x2>; 458 regulator-name = "vcc_ddr"; 459 regulator-state-mem { 460 regulator-on-in-suspend; 461 }; 462 }; 463 464 vcc_3v0: DCDC_REG4 { 465 regulator-always-on; 466 regulator-boot-on; 467 regulator-min-microvolt = <3000000>; 468 regulator-max-microvolt = <3000000>; 469 regulator-initial-mode = <0x2>; 470 regulator-name = "vcc_3v0"; 471 regulator-state-mem { 472 regulator-off-in-suspend; 473 regulator-suspend-microvolt = <3000000>; 474 }; 475 }; 476 477 vcc_1v0: LDO_REG1 { 478 regulator-always-on; 479 regulator-boot-on; 480 regulator-min-microvolt = <1000000>; 481 regulator-max-microvolt = <1000000>; 482 regulator-name = "vcc_1v0"; 483 regulator-state-mem { 484 regulator-on-in-suspend; 485 regulator-suspend-microvolt = <1000000>; 486 }; 487 }; 488 489 vcc1v8_soc: LDO_REG2 { 490 regulator-always-on; 491 regulator-boot-on; 492 regulator-min-microvolt = <1800000>; 493 regulator-max-microvolt = <1800000>; 494 495 regulator-name = "vcc1v8_soc"; 496 regulator-state-mem { 497 regulator-on-in-suspend; 498 regulator-suspend-microvolt = <1800000>; 499 }; 500 }; 501 502 vdd1v0_soc: LDO_REG3 { 503 regulator-always-on; 504 regulator-boot-on; 505 regulator-min-microvolt = <1000000>; 506 regulator-max-microvolt = <1000000>; 507 508 regulator-name = "vcc1v0_soc"; 509 regulator-state-mem { 510 regulator-on-in-suspend; 511 regulator-suspend-microvolt = <1000000>; 512 }; 513 }; 514 515 vcc3v0_pmu: LDO_REG4 { 516 regulator-always-on; 517 regulator-boot-on; 518 regulator-min-microvolt = <3000000>; 519 regulator-max-microvolt = <3000000>; 520 521 regulator-name = "vcc3v0_pmu"; 522 regulator-state-mem { 523 regulator-on-in-suspend; 524 regulator-suspend-microvolt = <3000000>; 525 526 }; 527 }; 528 529 vccio_sd: LDO_REG5 { 530 regulator-always-on; 531 regulator-boot-on; 532 regulator-min-microvolt = <1800000>; 533 regulator-max-microvolt = <3300000>; 534 535 regulator-name = "vccio_sd"; 536 regulator-state-mem { 537 regulator-on-in-suspend; 538 regulator-suspend-microvolt = <3300000>; 539 }; 540 }; 541 542 vcc_sd: LDO_REG6 { 543 regulator-min-microvolt = <3300000>; 544 regulator-max-microvolt = <3300000>; 545 546 regulator-name = "vcc_sd"; 547 regulator-state-mem { 548 regulator-on-in-suspend; 549 regulator-suspend-microvolt = <3300000>; 550 551 }; 552 }; 553 554 vcc2v8_dvp: LDO_REG7 { 555 regulator-always-on; 556 regulator-boot-on; 557 regulator-min-microvolt = <2800000>; 558 regulator-max-microvolt = <2800000>; 559 560 regulator-name = "vcc2v8_dvp"; 561 regulator-state-mem { 562 regulator-off-in-suspend; 563 regulator-suspend-microvolt = <2800000>; 564 }; 565 }; 566 567 vcc1v8_dvp: LDO_REG8 { 568 regulator-always-on; 569 regulator-boot-on; 570 regulator-min-microvolt = <1800000>; 571 regulator-max-microvolt = <1800000>; 572 573 regulator-name = "vcc1v8_dvp"; 574 regulator-state-mem { 575 regulator-on-in-suspend; 576 regulator-suspend-microvolt = <1800000>; 577 }; 578 }; 579 580 vdd1v5_dvp: LDO_REG9 { 581 regulator-always-on; 582 regulator-boot-on; 583 regulator-min-microvolt = <1500000>; 584 regulator-max-microvolt = <1500000>; 585 586 regulator-name = "vdd1v5_dvp"; 587 regulator-state-mem { 588 regulator-off-in-suspend; 589 regulator-suspend-microvolt = <1500000>; 590 }; 591 }; 592 593 dcdc_boost: BOOST { 594 regulator-always-on; 595 regulator-boot-on; 596 regulator-min-microvolt = <4700000>; 597 regulator-max-microvolt = <5400000>; 598 regulator-name = "boost"; 599 }; 600 601 otg_switch: OTG_SWITCH { 602 regulator-name = "otg_switch"; 603 }; 604 }; 605 606 battery { 607 compatible = "rk817,battery"; 608 ocv_table = <3500 3625 3685 3697 3718 3735 3748 609 3760 3774 3788 3802 3816 3834 3853 610 3877 3908 3946 3975 4018 4071 4106>; 611 design_capacity = <2500>; 612 design_qmax = <2750>; 613 bat_res = <100>; 614 sleep_enter_current = <300>; 615 sleep_exit_current = <300>; 616 sleep_filter_current = <100>; 617 power_off_thresd = <3500>; 618 zero_algorithm_vol = <3850>; 619 max_soc_offset = <60>; 620 monitor_sec = <5>; 621 sample_res = <10>; 622 virtual_power = <1>; 623 }; 624 625 charger { 626 compatible = "rk817,charger"; 627 min_input_voltage = <4500>; 628 max_input_current = <1500>; 629 max_chrg_current = <2000>; 630 max_chrg_voltage = <4200>; 631 chrg_term_mode = <0>; 632 chrg_finish_cur = <300>; 633 virtual_power = <0>; 634 dc_det_adc = <0>; 635 extcon = <&u2phy>; 636 }; 637 638 rk817_codec: codec { 639 #sound-dai-cells = <0>; 640 compatible = "rockchip,rk817-codec"; 641 clocks = <&cru SCLK_I2S1_OUT>; 642 clock-names = "mclk"; 643 pinctrl-names = "default"; 644 pinctrl-0 = <&i2s1_2ch_mclk>; 645 hp-volume = <20>; 646 spk-volume = <3>; 647 status = "okay"; 648 }; 649 }; 650}; 651 652&i2c1 { 653 status = "okay"; 654 clock-frequency = <400000>; 655 i2c-scl-rising-time-ns = <275>; 656 i2c-scl-falling-time-ns = <16>; 657 658 sensor@f { 659 status = "okay"; 660 compatible = "ak8963"; 661 reg = <0x0f>; 662 type = <SENSOR_TYPE_COMPASS>; 663 irq_enable = <0>; 664 poll_delay_ms = <30>; 665 layout = <1>; 666 reprobe_en = <1>; 667 }; 668 669 gt1x: gt1x@14 { 670 compatible = "goodix,gt1x"; 671 reg = <0x14>; 672 power-supply = <&vcc18_lcd_n>; 673 goodix,rst-gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; 674 goodix,irq-gpio = <&gpio0 RK_PA5 IRQ_TYPE_LEVEL_LOW>; 675 }; 676 677 sensor@4c { 678 status = "okay"; 679 compatible = "gs_mma7660"; 680 reg = <0x4c>; 681 type = <SENSOR_TYPE_ACCEL>; 682 irq-gpio = <&gpio0 RK_PB5 IRQ_TYPE_LEVEL_LOW>; 683 irq_enable = <0>; 684 poll_delay_ms = <30>; 685 layout = <1>; 686 reprobe_en = <1>; 687 }; 688}; 689 690&i2c2 { 691 status = "okay"; 692}; 693 694&i2s1_2ch { 695 status = "okay"; 696 #sound-dai-cells = <0>; 697}; 698 699&io_domains { 700 status = "okay"; 701 702 vccio1-supply = <&vcc1v8_soc>; 703 vccio2-supply = <&vccio_sd>; 704 vccio3-supply = <&vcc1v8_dvp>; 705 vccio4-supply = <&vcc_3v0>; 706 vccio5-supply = <&vcc_3v0>; 707}; 708 709&isp_mmu { 710 status = "okay"; 711}; 712 713&nandc0 { 714 status = "okay"; 715}; 716 717&pinctrl { 718 headphone { 719 hp_det: hp-det { 720 rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>; 721 }; 722 }; 723 724 pmic { 725 pmic_int: pmic_int { 726 rockchip,pins = 727 <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; 728 }; 729 730 soc_slppin_gpio: soc_slppin_gpio { 731 rockchip,pins = 732 <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>; 733 }; 734 735 soc_slppin_slp: soc_slppin_slp { 736 rockchip,pins = 737 <0 RK_PA4 1 &pcfg_pull_none>; 738 }; 739 740 soc_slppin_rst: soc_slppin_rst { 741 rockchip,pins = 742 <0 RK_PA4 2 &pcfg_pull_none>; 743 }; 744 }; 745 746 sdio-pwrseq { 747 wifi_enable_h: wifi-enable-h { 748 rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 749 }; 750 }; 751}; 752 753&pmu_io_domains { 754 status = "okay"; 755 756 pmuio1-supply = <&vcc3v0_pmu>; 757 pmuio2-supply = <&vcc3v0_pmu>; 758}; 759 760&pwm1 { 761 status = "okay"; 762}; 763 764&rk_rga { 765 status = "okay"; 766}; 767 768&rockchip_suspend { 769 status = "okay"; 770 rockchip,sleep-debug-en = <1>; 771}; 772 773&saradc { 774 status = "okay"; 775 vref-supply = <&vcc1v8_soc>; 776}; 777 778&sdmmc { 779 bus-width = <4>; 780 cap-mmc-highspeed; 781 cap-sd-highspeed; 782 no-sdio; 783 no-mmc; 784 card-detect-delay = <800>; 785 ignore-pm-notify; 786 /*cd-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>; [> CD GPIO <]*/ 787 sd-uhs-sdr12; 788 sd-uhs-sdr25; 789 sd-uhs-sdr50; 790 sd-uhs-sdr104; 791 vqmmc-supply = <&vccio_sd>; 792 vmmc-supply = <&vcc_sd>; 793 status = "disabled"; 794}; 795 796&sdio { 797 bus-width = <4>; 798 cap-sd-highspeed; 799 no-sd; 800 no-mmc; 801 ignore-pm-notify; 802 keep-power-in-suspend; 803 non-removable; 804 mmc-pwrseq = <&sdio_pwrseq>; 805 sd-uhs-sdr104; 806 status = "okay"; 807}; 808 809&tsadc { 810 pinctrl-names = "gpio", "otpout"; 811 pinctrl-0 = <&tsadc_otp_pin>; 812 pinctrl-1 = <&tsadc_otp_out>; 813 status = "okay"; 814}; 815 816&u2phy { 817 status = "okay"; 818 819 u2phy_host: host-port { 820 status = "okay"; 821 }; 822 823 u2phy_otg: otg-port { 824 status = "okay"; 825 }; 826}; 827 828&usb20_otg { 829 status = "okay"; 830}; 831 832&uart1 { 833 pinctrl-names = "default"; 834 pinctrl-0 = <&uart1_xfer &uart1_cts>; 835 status = "okay"; 836}; 837 838&vopb { 839 status = "okay"; 840}; 841 842&vopb_mmu { 843 status = "okay"; 844}; 845 846&mpp_srv { 847 status = "okay"; 848}; 849 850&vdpu { 851 status = "okay"; 852}; 853 854&vepu { 855 status = "okay"; 856}; 857 858&vpu_mmu { 859 status = "okay"; 860}; 861 862&hevc { 863 status = "okay"; 864}; 865 866&hevc_mmu { 867 status = "okay"; 868}; 869