1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd 4 * 5 */ 6#include <dt-bindings/display/drm_mipi_dsi.h> 7#include <dt-bindings/clock/rk618-cru.h> 8 9/ { 10 backlight: backlight { 11 status = "okay"; 12 compatible = "pwm-backlight"; 13 pwms = <&pwm1 0 25000 0>; 14 brightness-levels = < 15 0 1 2 3 4 5 6 7 16 8 9 10 11 12 13 14 15 17 16 17 18 19 20 21 22 23 18 24 25 26 27 28 29 30 31 19 32 33 34 35 36 37 38 39 20 40 41 42 43 44 45 46 47 21 48 49 50 51 52 53 54 55 22 56 57 58 59 60 61 62 63 23 64 65 66 67 68 69 70 71 24 72 73 74 75 76 77 78 79 25 80 81 82 83 84 85 86 87 26 88 89 90 91 92 93 94 95 27 96 97 98 99 100 101 102 103 28 104 105 106 107 108 109 110 111 29 112 113 114 115 116 117 118 119 30 120 121 122 123 124 125 126 127 31 128 129 130 131 132 133 134 135 32 136 137 138 139 140 141 142 143 33 144 145 146 147 148 149 150 151 34 152 153 154 155 156 157 158 159 35 160 161 162 163 164 165 166 167 36 168 169 170 171 172 173 174 175 37 176 177 178 179 180 181 182 183 38 184 185 186 187 188 189 190 191 39 192 193 194 195 196 197 198 199 40 200 201 202 203 204 205 206 207 41 208 209 210 211 212 213 214 215 42 216 217 218 219 220 221 222 223 43 224 225 226 227 228 229 230 231 44 232 233 234 235 236 237 238 239 45 240 241 242 243 244 245 246 247 46 248 249 250 251 252 253 254 255>; 47 default-brightness-level = <200>; 48 }; 49 50 vcc3v3_lcd_n: vcc3v3-lcd-n { 51 compatible = "regulator-fixed"; 52 regulator-name = "vcc3v3_lcd_n"; 53 pinctrl-names = "default"; 54 pinctrl-0 = <&lcd_en>; 55 gpio = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>; 56 enable-active-high; 57 regulator-boot-on; 58 }; 59 60 reserved-memory { 61 #address-cells = <2>; 62 #size-cells = <2>; 63 ranges; 64 65 cma { 66 compatible = "shared-dma-pool"; 67 reusable; 68 size = <0x0 0x2000000>; 69 linux,cma-default; 70 }; 71 }; 72}; 73 74&i2c0 { 75 clock-frequency = <100000>; 76 status = "okay"; 77 78 gt1x: gt1x@14 { 79 compatible = "goodix,gt1x"; 80 reg = <0x14>; 81 pinctrl-names = "default"; 82 pinctrl-0 = <&tp_int>; 83 power-supply = <&vcc3v3_lcd_n>; 84 goodix,rst-gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>; 85 goodix,irq-gpio = <&gpio0 RK_PC0 IRQ_TYPE_LEVEL_LOW>; 86 }; 87 88 rk618@50 { 89 compatible = "rockchip,rk618"; 90 reg = <0x50>; 91 pinctrl-names = "default"; 92 pinctrl-0 = <&i2s_8ch_0_mclk>; 93 clocks = <&cru SCLK_I2S0_8CH_TX_OUT>; 94 clock-names = "clkin"; 95 assigned-clocks = <&cru SCLK_I2S0_8CH_TX_OUT>; 96 assigned-clock-rates = <12000000>; 97 power-supply = <&vcc3v3_lcd_n>; 98 reset-gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_LOW>; 99 status = "okay"; 100 101 clock: cru { 102 compatible = "rockchip,rk618-cru"; 103 clocks = <&cru SCLK_I2S0_8CH_TX_OUT>, <&cru DCLK_VOP>; 104 clock-names = "clkin", "lcdc0_dclkp"; 105 assigned-clocks = <&clock SCALER_PLLIN_CLK>, 106 <&clock VIF_PLLIN_CLK>, 107 <&clock SCALER_CLK>, 108 <&clock VIF0_PRE_CLK>, 109 <&clock CODEC_CLK>, 110 <&clock DITHER_CLK>; 111 assigned-clock-parents = <&cru SCLK_I2S0_8CH_TX_OUT>, 112 <&clock LCDC0_CLK>, 113 <&clock SCALER_PLL_CLK>, 114 <&clock VIF_PLL_CLK>, 115 <&cru SCLK_I2S0_8CH_TX_OUT>, 116 <&clock VIF0_CLK>; 117 #clock-cells = <1>; 118 status = "okay"; 119 }; 120 121 dsi { 122 compatible = "rockchip,rk618-dsi"; 123 clocks = <&clock MIPI_CLK>; 124 clock-names = "dsi"; 125 #address-cells = <1>; 126 #size-cells = <0>; 127 status = "okay"; 128 129 ports { 130 #address-cells = <1>; 131 #size-cells = <0>; 132 133 port@0 { 134 reg = <0>; 135 136 dsi_in_rgb: endpoint { 137 remote-endpoint = <&rgb_out_dsi>; 138 }; 139 }; 140 }; 141 142 panel@0 { 143 compatible = "sitronix,st7703", "simple-panel-dsi"; 144 reg = <0>; 145 power-supply = <&vcc3v3_lcd_n>; 146 backlight = <&backlight>; 147 148 prepare-delay-ms = <0>; 149 reset-delay-ms = <0>; 150 init-delay-ms = <80>; 151 enable-delay-ms = <0>; 152 disable-delay-ms = <10>; 153 unprepare-delay-ms = <60>; 154 155 width-mm = <68>; 156 height-mm = <121>; 157 158 dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 159 MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; 160 dsi,format = <MIPI_DSI_FMT_RGB888>; 161 dsi,lanes = <4>; 162 163 panel-init-sequence = [ 164 39 00 04 ff 98 81 03 165 15 00 02 01 00 166 15 00 02 02 00 167 15 00 02 03 53 168 15 00 02 04 53 169 15 00 02 05 13 170 15 00 02 06 04 171 15 00 02 07 02 172 15 00 02 08 02 173 15 00 02 09 00 174 15 00 02 0a 00 175 15 00 02 0b 00 176 15 00 02 0c 00 177 15 00 02 0d 00 178 15 00 02 0e 00 179 15 00 02 0f 00 180 181 15 00 02 10 00 182 15 00 02 11 00 183 15 00 02 12 00 184 15 00 02 13 00 185 15 00 02 14 00 186 15 00 02 15 08 187 15 00 02 16 10 188 15 00 02 17 00 189 15 00 02 18 08 190 15 00 02 19 00 191 15 00 02 1a 00 192 15 00 02 1b 00 193 15 00 02 1c 00 194 15 00 02 1d 00 195 15 00 02 1e c0 196 15 00 02 1f 80 197 198 15 00 02 20 02 199 15 00 02 21 09 200 15 00 02 22 00 201 15 00 02 23 00 202 15 00 02 24 00 203 15 00 02 25 00 204 15 00 02 26 00 205 15 00 02 27 00 206 15 00 02 28 55 207 15 00 02 29 03 208 15 00 02 2a 00 209 15 00 02 2b 00 210 15 00 02 2c 00 211 15 00 02 2d 00 212 15 00 02 2e 00 213 15 00 02 2f 00 214 215 15 00 02 30 00 216 15 00 02 31 00 217 15 00 02 32 00 218 15 00 02 33 00 219 15 00 02 34 04 220 15 00 02 35 05 221 15 00 02 36 05 222 15 00 02 37 00 223 15 00 02 38 3c 224 15 00 02 39 35 225 15 00 02 3a 00 226 15 00 02 3b 40 227 15 00 02 3c 00 228 15 00 02 3d 00 229 15 00 02 3e 00 230 15 00 02 3f 00 231 232 15 00 02 40 00 233 15 00 02 41 88 234 15 00 02 42 00 235 15 00 02 43 00 236 15 00 02 44 1f 237 238 15 00 02 50 01 239 15 00 02 51 23 240 15 00 02 52 45 241 15 00 02 53 67 242 15 00 02 54 89 243 15 00 02 55 ab 244 15 00 02 56 01 245 15 00 02 57 23 246 15 00 02 58 45 247 15 00 02 59 67 248 15 00 02 5a 89 249 15 00 02 5b ab 250 15 00 02 5c cd 251 15 00 02 5d ef 252 15 00 02 5e 03 253 15 00 02 5f 14 254 255 15 00 02 60 15 256 15 00 02 61 0c 257 15 00 02 62 0d 258 15 00 02 63 0e 259 15 00 02 64 0f 260 15 00 02 65 10 261 15 00 02 66 11 262 15 00 02 67 08 263 15 00 02 68 02 264 15 00 02 69 0a 265 15 00 02 6a 02 266 15 00 02 6b 02 267 15 00 02 6c 02 268 15 00 02 6d 02 269 15 00 02 6e 02 270 15 00 02 6f 02 271 272 15 00 02 70 02 273 15 00 02 71 02 274 15 00 02 72 06 275 15 00 02 73 02 276 15 00 02 74 02 277 15 00 02 75 14 278 15 00 02 76 15 279 15 00 02 77 0f 280 15 00 02 78 0e 281 15 00 02 79 0d 282 15 00 02 7a 0c 283 15 00 02 7b 11 284 15 00 02 7c 10 285 15 00 02 7d 06 286 15 00 02 7e 02 287 15 00 02 7f 0a 288 289 15 00 02 80 02 290 15 00 02 81 02 291 15 00 02 82 02 292 15 00 02 83 02 293 15 00 02 84 02 294 15 00 02 85 02 295 15 00 02 86 02 296 15 00 02 87 02 297 15 00 02 88 08 298 15 00 02 89 02 299 15 00 02 8a 02 300 301 39 00 04 ff 98 81 04 302 15 00 02 00 80 303 15 00 02 70 00 304 15 00 02 71 00 305 15 00 02 66 fe 306 15 00 02 82 15 307 15 00 02 84 15 308 15 00 02 85 15 309 15 00 02 3a 24 310 15 00 02 32 ac 311 15 00 02 8c 80 312 15 00 02 3c f5 313 15 00 02 88 33 314 315 39 00 04 ff 98 81 01 316 15 00 02 22 0a 317 15 00 02 31 00 318 15 00 02 53 78 319 15 00 02 50 5b 320 15 00 02 51 5b 321 15 00 02 60 20 322 15 00 02 61 00 323 15 00 02 62 0d 324 15 00 02 63 00 325 326 15 00 02 a0 00 327 15 00 02 a1 10 328 15 00 02 a2 1c 329 15 00 02 a3 13 330 15 00 02 a4 15 331 15 00 02 a5 26 332 15 00 02 a6 1a 333 15 00 02 a7 1d 334 15 00 02 a8 67 335 15 00 02 a9 1c 336 15 00 02 aa 29 337 15 00 02 ab 5b 338 15 00 02 ac 26 339 15 00 02 ad 28 340 15 00 02 ae 5c 341 15 00 02 af 30 342 15 00 02 b0 31 343 15 00 02 b1 2e 344 15 00 02 b2 32 345 15 00 02 b3 00 346 347 15 00 02 c0 00 348 15 00 02 c1 10 349 15 00 02 c2 1c 350 15 00 02 c3 13 351 15 00 02 c4 15 352 15 00 02 c5 26 353 15 00 02 c6 1a 354 15 00 02 c7 1d 355 15 00 02 c8 67 356 15 00 02 c9 1c 357 15 00 02 ca 29 358 15 00 02 cb 5b 359 15 00 02 cc 26 360 15 00 02 cd 28 361 15 00 02 ce 5c 362 15 00 02 cf 30 363 15 00 02 d0 31 364 15 00 02 d1 2e 365 15 00 02 d2 32 366 15 00 02 d3 00 367 39 00 04 ff 98 81 00 368 05 00 01 11 369 05 01 01 29 370 ]; 371 372 panel-exit-sequence = [ 373 05 00 01 28 374 05 00 01 10 375 ]; 376 377 display-timings { 378 native-mode = <&timing0>; 379 380 timing0: timing0 { 381 clock-frequency = <65000000>; 382 hactive = <720>; 383 vactive = <1280>; 384 hfront-porch = <48>; 385 hsync-len = <8>; 386 hback-porch = <52>; 387 vfront-porch = <16>; 388 vsync-len = <6>; 389 vback-porch = <15>; 390 hsync-active = <0>; 391 vsync-active = <0>; 392 de-active = <0>; 393 pixelclk-active = <0>; 394 }; 395 }; 396 }; 397 }; 398 }; 399}; 400 401 402&display_subsystem { 403 status = "okay"; 404}; 405 406&pinctrl { 407 lcd { 408 lcd_en: lcd-en { 409 rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; 410 }; 411 tp_int: tp-int { 412 rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; 413 }; 414 }; 415}; 416 417&pwm1 { 418 status = "okay"; 419}; 420 421&rgb { 422 status = "okay"; 423 pinctrl-names = "default"; 424 pinctrl-0 = <&lcdc_ctl &lcdc_rgb888_m1>; 425 426 ports { 427 rgb_out: port@1 { 428 reg = <1>; 429 #address-cells = <1>; 430 #size-cells = <0>; 431 432 rgb_out_dsi: endpoint@0 { 433 reg = <0>; 434 remote-endpoint = <&dsi_in_rgb>; 435 }; 436 }; 437 }; 438}; 439 440&route_rgb { 441 logo,kernel = "logo_kernel.bmp"; 442 status = "okay"; 443}; 444 445&vop { 446 status = "okay"; 447}; 448
