1 /* 2 * rk3228_codec.h -- rk3228 ALSA Soc Audio driver 3 * 4 * Copyright (c) 2018, Fuzhou Rockchip Electronics Co., Ltd All rights reserved. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program. If not, see <http://www.gnu.org/licenses/>. 17 * 18 */ 19 20 #ifndef _RK3228_CODEC_H 21 #define _RK3228_CODEC_H 22 23 /* codec register */ 24 #define CODEC_RESET (0x00 << 2) 25 #define DAC_INIT_CTRL1 (0x03 << 2) 26 #define DAC_INIT_CTRL2 (0x04 << 2) 27 #define DAC_INIT_CTRL3 (0x05 << 2) 28 #define DAC_PRECHARGE_CTRL (0x22 << 2) 29 #define DAC_PWR_CTRL (0x23 << 2) 30 #define DAC_CLK_CTRL (0x24 << 2) 31 #define HPMIX_CTRL (0x25 << 2) 32 #define DAC_SELECT (0x26 << 2) 33 #define HPOUT_CTRL (0x27 << 2) 34 #define HPOUTL_GAIN_CTRL (0x28 << 2) 35 #define HPOUTR_GAIN_CTRL (0x29 << 2) 36 #define HPOUT_POP_CTRL (0x2a << 2) 37 38 /* REG00: CODEC_RESET */ 39 #define PWR_RST_BYPASS_DIS BIT(6) 40 #define PWR_RST_BYPASS_EN BIT(6) 41 #define DIG_CORE_RST (0 << 1) 42 #define DIG_CORE_WORK BIT(1) 43 #define SYS_RST (0) 44 #define SYS_WORK BIT(0) 45 46 /* REG03: DAC_INIT_CTRL1 */ 47 #define PIN_DIRECTION_MASK BIT(5) 48 #define PIN_DIRECTION_IN (0 << 5) 49 #define PIN_DIRECTION_OUT BIT(5) 50 #define DAC_I2S_MODE_MASK BIT(4) 51 #define DAC_I2S_MODE_SLAVE (0 << 4) 52 #define DAC_I2S_MODE_MASTER BIT(4) 53 54 /* REG04: DAC_INIT_CTRL2 */ 55 #define DAC_I2S_LRP_MASK BIT(7) 56 #define DAC_I2S_LRP_NORMAL (0 << 7) 57 #define DAC_I2S_LRP_REVERSAL BIT(7) 58 #define DAC_VDL_MASK (3 << 5) 59 #define DAC_VDL_16BITS (0 << 5) 60 #define DAC_VDL_20BITS BIT(5) 61 #define DAC_VDL_24BITS (2 << 5) 62 #define DAC_VDL_32BITS (3 << 5) 63 #define DAC_MODE_MASK (3 << 3) 64 #define DAC_MODE_RJM (0 << 3) 65 #define DAC_MODE_LJM BIT(3) 66 #define DAC_MODE_I2S (2 << 3) 67 #define DAC_MODE_PCM (3 << 3) 68 #define DAC_LR_SWAP_MASK BIT(2) 69 #define DAC_LR_SWAP_DIS (0 << 2) 70 #define DAC_LR_SWAP_EN BIT(2) 71 72 /* REG05: DAC_INIT_CTRL3 */ 73 #define DAC_WL_MASK (3 << 2) 74 #define DAC_WL_16BITS (0 << 2) 75 #define DAC_WL_20BITS BIT(2) 76 #define DAC_WL_24BITS (2 << 2) 77 #define DAC_WL_32BITS (3 << 2) 78 #define DAC_RST_MASK BIT(1) 79 #define DAC_RST_EN (0 << 1) 80 #define DAC_RST_DIS BIT(1) 81 #define DAC_BCP_MASK BIT(0) 82 #define DAC_BCP_NORMAL (0 << 0) 83 #define DAC_BCP_REVERSAL BIT(0) 84 85 /* REG22: DAC_PRECHARGE_CTRL */ 86 #define DAC_CHARGE_PRECHARGE BIT(7) 87 #define DAC_CHARGE_DISCHARGE (0 << 7) 88 #define DAC_CHARGE_XCHARGE_MASK BIT(7) 89 #define DAC_CHARGE_CURRENT_64I BIT(6) 90 #define DAC_CHARGE_CURRENT_64I_MASK BIT(6) 91 #define DAC_CHARGE_CURRENT_32I BIT(5) 92 #define DAC_CHARGE_CURRENT_32I_MASK BIT(5) 93 #define DAC_CHARGE_CURRENT_16I BIT(4) 94 #define DAC_CHARGE_CURRENT_16I_MASK BIT(4) 95 #define DAC_CHARGE_CURRENT_08I BIT(3) 96 #define DAC_CHARGE_CURRENT_08I_MASK BIT(3) 97 #define DAC_CHARGE_CURRENT_04I BIT(2) 98 #define DAC_CHARGE_CURRENT_04I_MASK BIT(2) 99 #define DAC_CHARGE_CURRENT_02I BIT(1) 100 #define DAC_CHARGE_CURRENT_02I_MASK BIT(1) 101 #define DAC_CHARGE_CURRENT_I BIT(0) 102 #define DAC_CHARGE_CURRENT_I_MASK BIT(0) 103 #define DAC_CHARGE_CURRENT_ALL_MASK (0x7f) 104 #define DAC_CHARGE_CURRENT_ALL_OFF (0x0) 105 #define DAC_CHARGE_CURRENT_ALL_ON (0x7f) 106 107 /* REG23: DAC_PWR_CTRL */ 108 #define DAC_PWR_OFF (0 << 6) 109 #define DAC_PWR_ON BIT(6) 110 #define DAC_PWR_MASK BIT(6) 111 #define DACL_PATH_REFV_OFF (0 << 5) 112 #define DACL_PATH_REFV_ON BIT(5) 113 #define DACL_PATH_REFV_MASK BIT(5) 114 #define HPOUTL_ZERO_CROSSING_OFF (0 << 4) 115 #define HPOUTL_ZERO_CROSSING_ON BIT(4) 116 #define DACR_PATH_REFV_OFF (0 << 1) 117 #define DACR_PATH_REFV_ON BIT(1) 118 #define DACR_PATH_REFV_MASK BIT(1) 119 #define HPOUTR_ZERO_CROSSING_OFF (0 << 0) 120 #define HPOUTR_ZERO_CROSSING_ON BIT(0) 121 122 /* REG24: DAC_CLK_CTRL */ 123 #define DACL_REFV_OFF (0 << 7) 124 #define DACL_REFV_ON BIT(7) 125 #define DACL_REFV_MASK BIT(7) 126 #define DACL_CLK_OFF (0 << 6) 127 #define DACL_CLK_ON BIT(6) 128 #define DACL_CLK_MASK BIT(6) 129 #define DACL_OFF (0 << 5) 130 #define DACL_ON BIT(5) 131 #define DACL_MASK BIT(5) 132 #define DACL_INIT_OFF (0 << 4) 133 #define DACL_INIT_ON BIT(4) 134 #define DACL_INIT_MASK BIT(4) 135 #define DACR_REFV_OFF (0 << 3) 136 #define DACR_REFV_ON BIT(3) 137 #define DACR_REFV_MASK BIT(3) 138 #define DACR_CLK_OFF (0 << 2) 139 #define DACR_CLK_ON BIT(2) 140 #define DACR_CLK_MASK BIT(2) 141 #define DACR_OFF (0 << 1) 142 #define DACR_ON BIT(1) 143 #define DACR_MASK BIT(1) 144 #define DACR_INIT_OFF (0 << 0) 145 #define DACR_INIT_ON BIT(0) 146 #define DACR_INIT_MASK BIT(0) 147 148 /* REG25: HPMIX_CTRL*/ 149 #define HPMIXL_DIS (0 << 6) 150 #define HPMIXL_EN BIT(6) 151 #define HPMIXL_MASK BIT(6) 152 #define HPMIXL_INIT_DIS (0 << 5) 153 #define HPMIXL_INIT_EN BIT(5) 154 #define HPMIXL_INIT_MASK BIT(5) 155 #define HPMIXL_INIT2_DIS (0 << 4) 156 #define HPMIXL_INIT2_EN BIT(4) 157 #define HPMIXL_INIT2_MASK BIT(4) 158 #define HPMIXR_DIS (0 << 2) 159 #define HPMIXR_EN BIT(2) 160 #define HPMIXR_MASK BIT(2) 161 #define HPMIXR_INIT_DIS (0 << 1) 162 #define HPMIXR_INIT_EN BIT(1) 163 #define HPMIXR_INIT_MASK BIT(1) 164 #define HPMIXR_INIT2_DIS (0 << 0) 165 #define HPMIXR_INIT2_EN BIT(0) 166 #define HPMIXR_INIT2_MASK BIT(0) 167 168 /* REG26: DAC_SELECT */ 169 #define DACL_SELECT BIT(4) 170 #define DACL_SELECT_MASK BIT(4) 171 #define DACL_DESELECT (0 << 4) 172 #define DACR_SELECT BIT(0) 173 #define DACR_SELECT_MASK BIT(0) 174 #define DACR_DESELECT (0 << 0) 175 176 /* REG27: HPOUT_CTRL */ 177 #define HPOUTL_DIS (0 << 7) 178 #define HPOUTL_EN BIT(7) 179 #define HPOUTL_MASK BIT(7) 180 #define HPOUTL_INIT_DIS (0 << 6) 181 #define HPOUTL_INIT_EN BIT(6) 182 #define HPOUTL_INIT_MASK BIT(6) 183 #define HPOUTL_MUTE (0 << 5) 184 #define HPOUTL_UNMUTE BIT(5) 185 #define HPOUTL_MUTE_MASK BIT(5) 186 #define HPOUTR_DIS (0 << 4) 187 #define HPOUTR_EN BIT(4) 188 #define HPOUTR_MASK BIT(4) 189 #define HPOUTR_INIT_DIS (0 << 3) 190 #define HPOUTR_INIT_EN BIT(3) 191 #define HPOUTR_INIT_MASK BIT(3) 192 #define HPOUTR_MUTE (0 << 2) 193 #define HPOUTR_UNMUTE BIT(2) 194 #define HPOUTR_MUTE_MASK BIT(2) 195 196 /* REG28: HPOUTL_GAIN_CTRL */ 197 #define HPOUTL_GAIN_MASK (0X1f << 0) 198 199 /* REG29: HPOUTR_GAIN_CTRL */ 200 #define HPOUTR_GAIN_MASK (0X1f << 0) 201 202 /* REG2a: HPOUT_POP_CTRL */ 203 #define HPOUTR_POP_XCHARGE BIT(4) 204 #define HPOUTR_POP_WORK (2 << 4) 205 #define HPOUTR_POP_MASK (3 << 4) 206 #define HPOUTL_POP_XCHARGE BIT(0) 207 #define HPOUTL_POP_WORK (2 << 0) 208 #define HPOUTL_POP_MASK (3 << 0) 209 210 #define RK3228_HIFI (0) 211 212 struct rk3228_reg_msk_val { 213 unsigned int reg; 214 unsigned int msk; 215 unsigned int val; 216 }; 217 218 #endif 219