1 /*
2 * Copyright (c) 2019-2026, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <assert.h>
8
9 #include <common/debug.h>
10 #include <common/fdt_wrappers.h>
11 #include <drivers/io/io_storage.h>
12 #include <drivers/partition/partition.h>
13 #include <lib/object_pool.h>
14 #include <libfdt.h>
15 #include <tools_share/firmware_image_package.h>
16
17 #include <plat/arm/common/arm_fconf_getter.h>
18 #include <plat/arm/common/arm_fconf_io_storage.h>
19 #include <platform_def.h>
20
21 #if PSA_FWU_SUPPORT
22 /* metadata entry details */
23 static io_block_spec_t fwu_metadata_spec;
24 #endif /* PSA_FWU_SUPPORT */
25
26 io_block_spec_t fip_block_spec = {
27 /*
28 * - With ARM_GPT_SUPPORT and BL1: a fixed FIP offset within the GPT image is used.
29 * - With ARM_GPT_SUPPORT and BL2: the FIP offset is derived from
30 * the partition table entries at runtime.
31 * - Without ARM_GPT_SUPPORT: both BL1 and BL2 use the fixed FIP base address.
32 */
33 #if ARM_GPT_SUPPORT
34 #if IMAGE_BL1
35 .offset = PLAT_ARM_FLASH_IMAGE_BASE + PLAT_ARM_FIP_OFFSET_IN_GPT,
36 #endif /* IMAGE_BL1 */
37 #else
38 .offset = PLAT_ARM_FLASH_IMAGE_BASE,
39 #endif /* ARM_GPT_SUPPORT */
40 .length = PLAT_ARM_FLASH_IMAGE_MAX_SIZE
41 };
42
43 #if ARM_GPT_SUPPORT
44 static const io_block_spec_t gpt_spec = {
45 .offset = PLAT_ARM_FLASH_IMAGE_BASE,
46 /*
47 * PLAT_PARTITION_BLOCK_SIZE = 512
48 * PLAT_PARTITION_MAX_ENTRIES = 128
49 * each sector has 4 partition entries, and there are
50 * 2 reserved sectors i.e. protective MBR and primary
51 * GPT header hence length gets calculated as,
52 * length = PLAT_PARTITION_BLOCK_SIZE * (128/4 + 2)
53 */
54 .length = LBA(PLAT_PARTITION_MAX_ENTRIES / 4 + 2),
55 };
56
57 /*
58 * length will be assigned at runtime based on MBR header data.
59 * Backup GPT Header is present in Last LBA-1 and its entries
60 * are last 32 blocks starts at LBA-33, On runtime update these
61 * before device usage. Update offset to beginning LBA-33 and
62 * length to LBA-33.
63 * Each LBA holds 4 GPT entries (128B), and the +1 LBA accounts
64 * for the backup GPT header at LBA-1.
65 */
66 static io_block_spec_t bkup_gpt_spec = {
67 .offset = PLAT_ARM_FLASH_IMAGE_BASE,
68 .length = LBA(PLAT_PARTITION_MAX_ENTRIES / 4 + 1),
69 };
70 #endif /* ARM_GPT_SUPPORT */
71
72 const io_uuid_spec_t arm_uuid_spec[MAX_NUMBER_IDS] = {
73 [BL2_IMAGE_ID] = {UUID_TRUSTED_BOOT_FIRMWARE_BL2},
74 [TB_FW_CONFIG_ID] = {UUID_TB_FW_CONFIG},
75 [FW_CONFIG_ID] = {UUID_FW_CONFIG},
76 #if !ARM_IO_IN_DTB
77 [SCP_BL2_IMAGE_ID] = {UUID_SCP_FIRMWARE_SCP_BL2},
78 [BL31_IMAGE_ID] = {UUID_EL3_RUNTIME_FIRMWARE_BL31},
79 [BL32_IMAGE_ID] = {UUID_SECURE_PAYLOAD_BL32},
80 [BL32_EXTRA1_IMAGE_ID] = {UUID_SECURE_PAYLOAD_BL32_EXTRA1},
81 [BL32_EXTRA2_IMAGE_ID] = {UUID_SECURE_PAYLOAD_BL32_EXTRA2},
82 [BL33_IMAGE_ID] = {UUID_NON_TRUSTED_FIRMWARE_BL33},
83 [HW_CONFIG_ID] = {UUID_HW_CONFIG},
84 [SOC_FW_CONFIG_ID] = {UUID_SOC_FW_CONFIG},
85 [TOS_FW_CONFIG_ID] = {UUID_TOS_FW_CONFIG},
86 [NT_FW_CONFIG_ID] = {UUID_NT_FW_CONFIG},
87 [RMM_IMAGE_ID] = {UUID_REALM_MONITOR_MGMT_FIRMWARE},
88 #if ETHOSN_NPU_TZMP1
89 [ETHOSN_NPU_FW_IMAGE_ID] = {UUID_ETHOSN_FW},
90 #endif /* ETHOSN_NPU_TZMP1 */
91 #endif /* ARM_IO_IN_DTB */
92 #if TRUSTED_BOARD_BOOT
93 [TRUSTED_BOOT_FW_CERT_ID] = {UUID_TRUSTED_BOOT_FW_CERT},
94 #if !ARM_IO_IN_DTB
95 [CCA_CONTENT_CERT_ID] = {UUID_CCA_CONTENT_CERT},
96 [CORE_SWD_KEY_CERT_ID] = {UUID_CORE_SWD_KEY_CERT},
97 [PLAT_KEY_CERT_ID] = {UUID_PLAT_KEY_CERT},
98 [TRUSTED_KEY_CERT_ID] = {UUID_TRUSTED_KEY_CERT},
99 [SCP_FW_KEY_CERT_ID] = {UUID_SCP_FW_KEY_CERT},
100 [SOC_FW_KEY_CERT_ID] = {UUID_SOC_FW_KEY_CERT},
101 [TRUSTED_OS_FW_KEY_CERT_ID] = {UUID_TRUSTED_OS_FW_KEY_CERT},
102 [NON_TRUSTED_FW_KEY_CERT_ID] = {UUID_NON_TRUSTED_FW_KEY_CERT},
103 [SCP_FW_CONTENT_CERT_ID] = {UUID_SCP_FW_CONTENT_CERT},
104 [SOC_FW_CONTENT_CERT_ID] = {UUID_SOC_FW_CONTENT_CERT},
105 [TRUSTED_OS_FW_CONTENT_CERT_ID] = {UUID_TRUSTED_OS_FW_CONTENT_CERT},
106 [NON_TRUSTED_FW_CONTENT_CERT_ID] = {UUID_NON_TRUSTED_FW_CONTENT_CERT},
107 #if defined(SPD_spmd)
108 [SIP_SP_CONTENT_CERT_ID] = {UUID_SIP_SECURE_PARTITION_CONTENT_CERT},
109 [PLAT_SP_CONTENT_CERT_ID] = {UUID_PLAT_SECURE_PARTITION_CONTENT_CERT},
110 #endif
111 #if ETHOSN_NPU_TZMP1
112 [ETHOSN_NPU_FW_KEY_CERT_ID] = {UUID_ETHOSN_FW_KEY_CERTIFICATE},
113 [ETHOSN_NPU_FW_CONTENT_CERT_ID] = {UUID_ETHOSN_FW_CONTENT_CERTIFICATE},
114 #endif /* ETHOSN_NPU_TZMP1 */
115 #endif /* ARM_IO_IN_DTB */
116 #endif /* TRUSTED_BOARD_BOOT */
117 };
118
119 /* By default, ARM platforms load images from the FIP */
120 struct plat_io_policy policies[MAX_NUMBER_IDS] = {
121 #if ARM_GPT_SUPPORT
122 [GPT_IMAGE_ID] = {
123 &memmap_dev_handle,
124 (uintptr_t)&gpt_spec,
125 open_memmap
126 },
127 [BKUP_GPT_IMAGE_ID] = {
128 &memmap_dev_handle,
129 (uintptr_t)&bkup_gpt_spec,
130 open_memmap
131 },
132 #endif /* ARM_GPT_SUPPORT */
133 #if PSA_FWU_SUPPORT
134 [FWU_METADATA_IMAGE_ID] = {
135 &memmap_dev_handle,
136 /* filled runtime from partition information */
137 (uintptr_t)&fwu_metadata_spec,
138 open_memmap
139 },
140 [BKUP_FWU_METADATA_IMAGE_ID] = {
141 &memmap_dev_handle,
142 /* filled runtime from partition information */
143 (uintptr_t)&fwu_metadata_spec,
144 open_memmap
145 },
146 #endif /* PSA_FWU_SUPPORT */
147 [FIP_IMAGE_ID] = {
148 &memmap_dev_handle,
149 (uintptr_t)&fip_block_spec,
150 open_memmap
151 },
152 #if !defined(DECRYPTION_SUPPORT_none)
153 [ENC_IMAGE_ID] = {
154 &fip_dev_handle,
155 (uintptr_t)NULL,
156 open_fip
157 },
158 #endif
159 [BL2_IMAGE_ID] = {
160 &fip_dev_handle,
161 (uintptr_t)&arm_uuid_spec[BL2_IMAGE_ID],
162 open_fip
163 },
164 [TB_FW_CONFIG_ID] = {
165 &fip_dev_handle,
166 (uintptr_t)&arm_uuid_spec[TB_FW_CONFIG_ID],
167 open_fip
168 },
169 [FW_CONFIG_ID] = {
170 &fip_dev_handle,
171 (uintptr_t)&arm_uuid_spec[FW_CONFIG_ID],
172 open_fip
173 },
174 #if !ARM_IO_IN_DTB
175 [SCP_BL2_IMAGE_ID] = {
176 &fip_dev_handle,
177 (uintptr_t)&arm_uuid_spec[SCP_BL2_IMAGE_ID],
178 open_fip
179 },
180 #if ENCRYPT_BL31 && !defined(DECRYPTION_SUPPORT_none)
181 [BL31_IMAGE_ID] = {
182 &enc_dev_handle,
183 (uintptr_t)&arm_uuid_spec[BL31_IMAGE_ID],
184 open_enc_fip
185 },
186 #else
187 [BL31_IMAGE_ID] = {
188 &fip_dev_handle,
189 (uintptr_t)&arm_uuid_spec[BL31_IMAGE_ID],
190 open_fip
191 },
192 #endif
193 #if ENCRYPT_BL32 && !defined(DECRYPTION_SUPPORT_none)
194 [BL32_IMAGE_ID] = {
195 &enc_dev_handle,
196 (uintptr_t)&arm_uuid_spec[BL32_IMAGE_ID],
197 open_enc_fip
198 },
199 [BL32_EXTRA1_IMAGE_ID] = {
200 &enc_dev_handle,
201 (uintptr_t)&arm_uuid_spec[BL32_EXTRA1_IMAGE_ID],
202 open_enc_fip
203 },
204 [BL32_EXTRA2_IMAGE_ID] = {
205 &enc_dev_handle,
206 (uintptr_t)&arm_uuid_spec[BL32_EXTRA2_IMAGE_ID],
207 open_enc_fip
208 },
209 #else
210 [BL32_IMAGE_ID] = {
211 &fip_dev_handle,
212 (uintptr_t)&arm_uuid_spec[BL32_IMAGE_ID],
213 open_fip
214 },
215 [BL32_EXTRA1_IMAGE_ID] = {
216 &fip_dev_handle,
217 (uintptr_t)&arm_uuid_spec[BL32_EXTRA1_IMAGE_ID],
218 open_fip
219 },
220 [BL32_EXTRA2_IMAGE_ID] = {
221 &fip_dev_handle,
222 (uintptr_t)&arm_uuid_spec[BL32_EXTRA2_IMAGE_ID],
223 open_fip
224 },
225 #endif
226 [BL33_IMAGE_ID] = {
227 &fip_dev_handle,
228 (uintptr_t)&arm_uuid_spec[BL33_IMAGE_ID],
229 open_fip
230 },
231 [RMM_IMAGE_ID] = {
232 &fip_dev_handle,
233 (uintptr_t)&arm_uuid_spec[RMM_IMAGE_ID],
234 open_fip
235 },
236 [HW_CONFIG_ID] = {
237 &fip_dev_handle,
238 (uintptr_t)&arm_uuid_spec[HW_CONFIG_ID],
239 open_fip
240 },
241 [SOC_FW_CONFIG_ID] = {
242 &fip_dev_handle,
243 (uintptr_t)&arm_uuid_spec[SOC_FW_CONFIG_ID],
244 open_fip
245 },
246 [TOS_FW_CONFIG_ID] = {
247 &fip_dev_handle,
248 (uintptr_t)&arm_uuid_spec[TOS_FW_CONFIG_ID],
249 open_fip
250 },
251 [NT_FW_CONFIG_ID] = {
252 &fip_dev_handle,
253 (uintptr_t)&arm_uuid_spec[NT_FW_CONFIG_ID],
254 open_fip
255 },
256 #if ETHOSN_NPU_TZMP1
257 [ETHOSN_NPU_FW_IMAGE_ID] = {
258 &fip_dev_handle,
259 (uintptr_t)&arm_uuid_spec[ETHOSN_NPU_FW_IMAGE_ID],
260 open_fip
261 },
262 #endif /* ETHOSN_NPU_TZMP1 */
263 #endif /* ARM_IO_IN_DTB */
264 #if TRUSTED_BOARD_BOOT
265 [TRUSTED_BOOT_FW_CERT_ID] = {
266 &fip_dev_handle,
267 (uintptr_t)&arm_uuid_spec[TRUSTED_BOOT_FW_CERT_ID],
268 open_fip
269 },
270 #if !ARM_IO_IN_DTB
271 [CCA_CONTENT_CERT_ID] = {
272 &fip_dev_handle,
273 (uintptr_t)&arm_uuid_spec[CCA_CONTENT_CERT_ID],
274 open_fip
275 },
276 [CORE_SWD_KEY_CERT_ID] = {
277 &fip_dev_handle,
278 (uintptr_t)&arm_uuid_spec[CORE_SWD_KEY_CERT_ID],
279 open_fip
280 },
281 [PLAT_KEY_CERT_ID] = {
282 &fip_dev_handle,
283 (uintptr_t)&arm_uuid_spec[PLAT_KEY_CERT_ID],
284 open_fip
285 },
286 [TRUSTED_KEY_CERT_ID] = {
287 &fip_dev_handle,
288 (uintptr_t)&arm_uuid_spec[TRUSTED_KEY_CERT_ID],
289 open_fip
290 },
291 [SCP_FW_KEY_CERT_ID] = {
292 &fip_dev_handle,
293 (uintptr_t)&arm_uuid_spec[SCP_FW_KEY_CERT_ID],
294 open_fip
295 },
296 [SOC_FW_KEY_CERT_ID] = {
297 &fip_dev_handle,
298 (uintptr_t)&arm_uuid_spec[SOC_FW_KEY_CERT_ID],
299 open_fip
300 },
301 [TRUSTED_OS_FW_KEY_CERT_ID] = {
302 &fip_dev_handle,
303 (uintptr_t)&arm_uuid_spec[TRUSTED_OS_FW_KEY_CERT_ID],
304 open_fip
305 },
306 [NON_TRUSTED_FW_KEY_CERT_ID] = {
307 &fip_dev_handle,
308 (uintptr_t)&arm_uuid_spec[NON_TRUSTED_FW_KEY_CERT_ID],
309 open_fip
310 },
311 [SCP_FW_CONTENT_CERT_ID] = {
312 &fip_dev_handle,
313 (uintptr_t)&arm_uuid_spec[SCP_FW_CONTENT_CERT_ID],
314 open_fip
315 },
316 [SOC_FW_CONTENT_CERT_ID] = {
317 &fip_dev_handle,
318 (uintptr_t)&arm_uuid_spec[SOC_FW_CONTENT_CERT_ID],
319 open_fip
320 },
321 [TRUSTED_OS_FW_CONTENT_CERT_ID] = {
322 &fip_dev_handle,
323 (uintptr_t)&arm_uuid_spec[TRUSTED_OS_FW_CONTENT_CERT_ID],
324 open_fip
325 },
326 [NON_TRUSTED_FW_CONTENT_CERT_ID] = {
327 &fip_dev_handle,
328 (uintptr_t)&arm_uuid_spec[NON_TRUSTED_FW_CONTENT_CERT_ID],
329 open_fip
330 },
331 #if defined(SPD_spmd)
332 [SIP_SP_CONTENT_CERT_ID] = {
333 &fip_dev_handle,
334 (uintptr_t)&arm_uuid_spec[SIP_SP_CONTENT_CERT_ID],
335 open_fip
336 },
337 [PLAT_SP_CONTENT_CERT_ID] = {
338 &fip_dev_handle,
339 (uintptr_t)&arm_uuid_spec[PLAT_SP_CONTENT_CERT_ID],
340 open_fip
341 },
342 #endif
343 #if ETHOSN_NPU_TZMP1
344 [ETHOSN_NPU_FW_KEY_CERT_ID] = {
345 &fip_dev_handle,
346 (uintptr_t)&arm_uuid_spec[ETHOSN_NPU_FW_KEY_CERT_ID],
347 open_fip
348 },
349 [ETHOSN_NPU_FW_CONTENT_CERT_ID] = {
350 &fip_dev_handle,
351 (uintptr_t)&arm_uuid_spec[ETHOSN_NPU_FW_CONTENT_CERT_ID],
352 open_fip
353 },
354 #endif /* ETHOSN_NPU_TZMP1 */
355 #endif /* ARM_IO_IN_DTB */
356 #endif /* TRUSTED_BOARD_BOOT */
357 };
358
359 #ifdef IMAGE_BL2
360
361 #define FCONF_ARM_IO_UUID_NUM_BASE U(10)
362
363 #if ETHOSN_NPU_TZMP1
364 #define FCONF_ARM_IO_UUID_NUM_NPU U(1)
365 #else
366 #define FCONF_ARM_IO_UUID_NUM_NPU U(0)
367 #endif /* ETHOSN_NPU_TZMP1 */
368
369 #if TRUSTED_BOARD_BOOT
370 #define FCONF_ARM_IO_UUID_NUM_TBB U(12)
371 #else
372 #define FCONF_ARM_IO_UUID_NUM_TBB U(0)
373 #endif /* TRUSTED_BOARD_BOOT */
374
375 #if TRUSTED_BOARD_BOOT && defined(SPD_spmd)
376 #define FCONF_ARM_IO_UUID_NUM_SPD U(2)
377 #else
378 #define FCONF_ARM_IO_UUID_NUM_SPD U(0)
379 #endif /* TRUSTED_BOARD_BOOT && defined(SPD_spmd) */
380
381 #if TRUSTED_BOARD_BOOT && ETHOSN_NPU_TZMP1
382 #define FCONF_ARM_IO_UUID_NUM_NPU_TBB U(2)
383 #else
384 #define FCONF_ARM_IO_UUID_NUM_NPU_TBB U(0)
385 #endif /* TRUSTED_BOARD_BOOT && ETHOSN_NPU_TZMP1 */
386
387 #define FCONF_ARM_IO_UUID_NUMBER FCONF_ARM_IO_UUID_NUM_BASE + \
388 FCONF_ARM_IO_UUID_NUM_NPU + \
389 FCONF_ARM_IO_UUID_NUM_TBB + \
390 FCONF_ARM_IO_UUID_NUM_SPD + \
391 FCONF_ARM_IO_UUID_NUM_NPU_TBB
392
393 static io_uuid_spec_t fconf_arm_uuids[FCONF_ARM_IO_UUID_NUMBER];
394 static OBJECT_POOL_ARRAY(fconf_arm_uuids_pool, fconf_arm_uuids);
395
396 struct policies_load_info {
397 unsigned int image_id;
398 const char *name;
399 };
400
401 /* image id to property name table */
402 static const struct policies_load_info load_info[FCONF_ARM_IO_UUID_NUMBER] = {
403 {SCP_BL2_IMAGE_ID, "scp_bl2_uuid"},
404 {BL31_IMAGE_ID, "bl31_uuid"},
405 {BL32_IMAGE_ID, "bl32_uuid"},
406 {BL32_EXTRA1_IMAGE_ID, "bl32_extra1_uuid"},
407 {BL32_EXTRA2_IMAGE_ID, "bl32_extra2_uuid"},
408 {BL33_IMAGE_ID, "bl33_uuid"},
409 {HW_CONFIG_ID, "hw_cfg_uuid"},
410 {SOC_FW_CONFIG_ID, "soc_fw_cfg_uuid"},
411 {TOS_FW_CONFIG_ID, "tos_fw_cfg_uuid"},
412 {NT_FW_CONFIG_ID, "nt_fw_cfg_uuid"},
413 #if ETHOSN_NPU_TZMP1
414 {ETHOSN_NPU_FW_IMAGE_ID, "ethosn_npu_fw_uuid"},
415 #endif /* ETHOSN_NPU_TZMP1 */
416 #if TRUSTED_BOARD_BOOT
417 {CCA_CONTENT_CERT_ID, "cca_cert_uuid"},
418 {CORE_SWD_KEY_CERT_ID, "core_swd_cert_uuid"},
419 {PLAT_KEY_CERT_ID, "plat_cert_uuid"},
420 {TRUSTED_KEY_CERT_ID, "t_key_cert_uuid"},
421 {SCP_FW_KEY_CERT_ID, "scp_fw_key_uuid"},
422 {SOC_FW_KEY_CERT_ID, "soc_fw_key_uuid"},
423 {TRUSTED_OS_FW_KEY_CERT_ID, "tos_fw_key_cert_uuid"},
424 {NON_TRUSTED_FW_KEY_CERT_ID, "nt_fw_key_cert_uuid"},
425 {SCP_FW_CONTENT_CERT_ID, "scp_fw_content_cert_uuid"},
426 {SOC_FW_CONTENT_CERT_ID, "soc_fw_content_cert_uuid"},
427 {TRUSTED_OS_FW_CONTENT_CERT_ID, "tos_fw_content_cert_uuid"},
428 {NON_TRUSTED_FW_CONTENT_CERT_ID, "nt_fw_content_cert_uuid"},
429 #if defined(SPD_spmd)
430 {SIP_SP_CONTENT_CERT_ID, "sip_sp_content_cert_uuid"},
431 {PLAT_SP_CONTENT_CERT_ID, "plat_sp_content_cert_uuid"},
432 #endif
433 #if ETHOSN_NPU_TZMP1
434 {ETHOSN_NPU_FW_KEY_CERT_ID, "ethosn_npu_fw_key_cert_uuid"},
435 {ETHOSN_NPU_FW_CONTENT_CERT_ID, "ethosn_npu_fw_content_cert_uuid"},
436 #endif /* ETHOSN_NPU_TZMP1 */
437 #endif /* TRUSTED_BOARD_BOOT */
438 };
439
fconf_populate_arm_io_policies(uintptr_t config)440 int fconf_populate_arm_io_policies(uintptr_t config)
441 {
442 int err, node;
443 unsigned int i;
444
445 union uuid_helper_t uuid_helper;
446 io_uuid_spec_t *uuid_ptr;
447
448 /* As libfdt uses void *, we can't avoid this cast */
449 const void *dtb = (void *)config;
450
451 /* Assert the node offset point to "arm,io-fip-handle" compatible property */
452 const char *compatible_str = "arm,io-fip-handle";
453 node = fdt_node_offset_by_compatible(dtb, -1, compatible_str);
454 if (node < 0) {
455 ERROR("FCONF: Can't find %s compatible in dtb\n", compatible_str);
456 return node;
457 }
458
459 /* Locate the uuid cells and read the value for all the load info uuid */
460 for (i = 0; i < FCONF_ARM_IO_UUID_NUMBER; i++) {
461 uuid_ptr = pool_alloc(&fconf_arm_uuids_pool);
462 err = fdtw_read_uuid(dtb, node, load_info[i].name, 16,
463 (uint8_t *)&uuid_helper);
464 if (err < 0) {
465 WARN("FCONF: Read cell failed for %s\n", load_info[i].name);
466 return err;
467 }
468
469 VERBOSE("FCONF: arm-io_policies.%s cell found with value = "
470 "%02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-%02x%02x%02x%02x%02x%02x\n",
471 load_info[i].name,
472 uuid_helper.uuid_struct.time_low[0], uuid_helper.uuid_struct.time_low[1],
473 uuid_helper.uuid_struct.time_low[2], uuid_helper.uuid_struct.time_low[3],
474 uuid_helper.uuid_struct.time_mid[0], uuid_helper.uuid_struct.time_mid[1],
475 uuid_helper.uuid_struct.time_hi_and_version[0],
476 uuid_helper.uuid_struct.time_hi_and_version[1],
477 uuid_helper.uuid_struct.clock_seq_hi_and_reserved,
478 uuid_helper.uuid_struct.clock_seq_low,
479 uuid_helper.uuid_struct.node[0], uuid_helper.uuid_struct.node[1],
480 uuid_helper.uuid_struct.node[2], uuid_helper.uuid_struct.node[3],
481 uuid_helper.uuid_struct.node[4], uuid_helper.uuid_struct.node[5]);
482
483 uuid_ptr->uuid = uuid_helper.uuid_struct;
484 policies[load_info[i].image_id].image_spec = (uintptr_t)uuid_ptr;
485 policies[load_info[i].image_id].dev_handle = &fip_dev_handle;
486 policies[load_info[i].image_id].check = open_fip;
487 }
488 return 0;
489 }
490
491 #if ARM_IO_IN_DTB
492 FCONF_REGISTER_POPULATOR(TB_FW, arm_io, fconf_populate_arm_io_policies);
493 #endif /* ARM_IO_IN_DTB */
494
495 #endif /* IMAGE_BL2 */
496