xref: /rk3399_ARM-atf/plat/arm/board/corstone1000/common/corstone1000_bl2_mem_params_desc.c (revision bbca58ffd3bedf8ae86856d1250e0e8b3aaa593f)
1 /*
2  * Copyright (c) 2021-2022, 2024 ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <common/desc_image_load.h>
8 
9 #include <platform_def.h>
10 
11 /*******************************************************************************
12  * Following descriptor provides BL image/ep information that gets used
13  * by BL2 to load the images and also subset of this information is
14  * passed to next BL image. The image loading sequence is managed by
15  * populating the images in required loading order. The image execution
16  * sequence is managed by populating the `next_handoff_image_id` with
17  * the next executable image id.
18  ******************************************************************************/
19 static bl_mem_params_node_t bl2_mem_params_descs[] = {
20 
21 	/* Fill BL31 related information */
22 	{
23 		.image_id = BL31_IMAGE_ID,
24 
25 		SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
26 			VERSION_2, entry_point_info_t,
27 			SECURE | EXECUTABLE | EP_FIRST_EXE),
28 		.ep_info.pc = BL31_BASE,
29 		.ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
30 			DISABLE_ALL_EXCEPTIONS),
31 			.ep_info.args.arg3 = ARM_BL31_PLAT_PARAM_VAL,
32 		SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
33 			VERSION_2, image_info_t, IMAGE_ATTRIB_PLAT_SETUP),
34 		.image_info.image_base = BL31_BASE,
35 		.image_info.image_max_size = BL31_LIMIT - BL31_BASE,
36 
37 #ifdef CORSTONE1000_WITH_BL32
38 		.next_handoff_image_id = BL32_IMAGE_ID,
39 #else
40 		.next_handoff_image_id = BL33_IMAGE_ID,
41 #endif
42 	},
43 
44 #ifdef CORSTONE1000_WITH_BL32
45 	/* Fill BL32 related information */
46 	{
47 		.image_id = BL32_IMAGE_ID,
48 
49 		SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
50 			VERSION_2, entry_point_info_t, SECURE | EXECUTABLE),
51 		.ep_info.pc = BL32_BASE,
52 			.ep_info.args.arg0 = CORSTONE1000_TOS_FW_CONFIG_BASE,
53 		SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
54 			VERSION_2, image_info_t, 0),
55 		.image_info.image_base = BL32_BASE,
56 		.image_info.image_max_size = BL32_LIMIT - BL32_BASE,
57 
58 		.next_handoff_image_id = BL33_IMAGE_ID,
59 	},
60 
61 	/* Fill TOS_FW_CONFIG related information */
62 	{
63 		.image_id = TOS_FW_CONFIG_ID,
64 		.image_info.image_base = CORSTONE1000_TOS_FW_CONFIG_BASE,
65 		.image_info.image_max_size = (CORSTONE1000_TOS_FW_CONFIG_LIMIT -
66 					      CORSTONE1000_TOS_FW_CONFIG_BASE),
67 		SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY,
68 			VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
69 		SET_STATIC_PARAM_HEAD(image_info, PARAM_IMAGE_BINARY,
70 		VERSION_2, image_info_t, 0),
71 		.next_handoff_image_id = INVALID_IMAGE_ID,
72 	},
73 #endif
74 	/* Fill BL33 related information */
75 	{
76 		.image_id = BL33_IMAGE_ID,
77 		SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
78 			VERSION_2, entry_point_info_t, NON_SECURE | EXECUTABLE),
79 		.ep_info.pc = BL33_BASE,
80 		.ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
81 				       DISABLE_ALL_EXCEPTIONS),
82 		SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
83 			VERSION_2, image_info_t, 0),
84 		.image_info.image_base = BL33_BASE,
85 		.image_info.image_max_size = BL33_LIMIT - BL33_BASE,
86 
87 		.next_handoff_image_id = INVALID_IMAGE_ID,
88 	},
89 };
90 
91 REGISTER_BL_IMAGE_DESCS(bl2_mem_params_descs)
92