xref: /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852be/phl/hal_g6/rtl8852b/pci/rtl8852be_hal.h (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1 /******************************************************************************
2  *
3  * Copyright(c) 2019 Realtek Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12  * more details.
13  *
14  *****************************************************************************/
15 #ifndef _RTL8852BE_HAL_H_
16 #define _RTL8852BE_HAL_H_
17 
18 /* rtl8852BE_halinit.c */
19 
20 #define R_AX_HIMR0 0x01A0
21 #define B_AX_HALT_C2H_INT_EN BIT(21)
22 #define B_AX_RON_INT_EN BIT(20)
23 #define B_AX_PDNINT_EN BIT(19)
24 #define B_AX_SPSANA_OCP_INT_EN BIT(18)
25 #define B_AX_SPS_OCP_INT_EN BIT(17)
26 #define B_AX_BTON_STS_UPDATE_INT_EN BIT(16)
27 #define B_AX_GPIOF_INT_EN BIT(15)
28 #define B_AX_GPIOE_INT_EN BIT(14)
29 #define B_AX_GPIOD_INT_EN BIT(13)
30 #define B_AX_GPIOC_INT_EN BIT(12)
31 #define B_AX_GPIOB_INT_EN BIT(11)
32 #define B_AX_GPIOA_INT_EN BIT(10)
33 #define B_AX_GPIO9_INT_EN BIT(9)
34 #define B_AX_GPIO8_INT_EN BIT(8)
35 #define B_AX_GPIO7_INT_EN BIT(7)
36 #define B_AX_GPIO6_INT_EN BIT(6)
37 #define B_AX_GPIO5_INT_EN BIT(5)
38 #define B_AX_GPIO4_INT_EN BIT(4)
39 #define B_AX_GPIO3_INT_EN BIT(3)
40 #define B_AX_GPIO2_INT_EN BIT(2)
41 #define B_AX_GPIO1_INT_EN BIT(1)
42 #define B_AX_GPIO0_INT_EN BIT(0)
43 
44 #define R_AX_HISR0 0x01A4
45 #define B_AX_HALT_C2H_INT BIT(21)
46 #define B_AX_RON_INT BIT(20)
47 #define B_AX_PDNINT BIT(19)
48 #define B_AX_SPSANA_OCP_INT BIT(18)
49 #define B_AX_SPS_OCP_INT BIT(17)
50 #define B_AX_BTON_STS_UPDATE_INT BIT(16)
51 #define B_AX_GPIOF_INT BIT(15)
52 #define B_AX_GPIOE_INT BIT(14)
53 #define B_AX_GPIOD_INT BIT(13)
54 #define B_AX_GPIOC_INT BIT(12)
55 #define B_AX_GPIOB_INT BIT(11)
56 #define B_AX_GPIOA_INT BIT(10)
57 #define B_AX_GPIO9_INT BIT(9)
58 #define B_AX_GPIO8_INT BIT(8)
59 #define B_AX_GPIO7_INT BIT(7)
60 #define B_AX_GPIO6_INT BIT(6)
61 #define B_AX_GPIO5_INT BIT(5)
62 #define B_AX_GPIO4_INT BIT(4)
63 #define B_AX_GPIO3_INT BIT(3)
64 #define B_AX_GPIO2_INT BIT(2)
65 #define B_AX_GPIO1_INT BIT(1)
66 #define B_AX_GPIO0_INT BIT(0)
67 
68 
69 #define R_AX_PCIE_HIMR00 0x10B0
70 #define B_AX_HC00ISR_IND_INT_EN BIT(27)
71 #define B_AX_HD1ISR_IND_INT_EN BIT(26)
72 #define B_AX_HD0ISR_IND_INT_EN BIT(25)
73 #define B_AX_HS0ISR_IND_INT_EN BIT(24)
74 #define B_AX_RETRAIN_INT_EN BIT(21)
75 #define B_AX_RPQBD_FULL_INT_EN BIT(20)
76 #define B_AX_RDU_INT_EN BIT(19)
77 #define B_AX_RXDMA_STUCK_INT_EN BIT(18)
78 #define B_AX_TXDMA_STUCK_INT_EN BIT(17)
79 #define B_AX_PCIE_HOTRST_INT_EN BIT(16)
80 #define B_AX_PCIE_FLR_INT_EN BIT(15)
81 #define B_AX_PCIE_PERST_INT_EN BIT(14)
82 #define B_AX_TXDMA_CH12_INT_EN BIT(13)
83 #define B_AX_TXDMA_CH9_INT_EN BIT(12)
84 #define B_AX_TXDMA_CH8_INT_EN BIT(11)
85 #define B_AX_TXDMA_ACH7_INT_EN BIT(10)
86 #define B_AX_TXDMA_ACH6_INT_EN BIT(9)
87 #define B_AX_TXDMA_ACH5_INT_EN BIT(8)
88 #define B_AX_TXDMA_ACH4_INT_EN BIT(7)
89 #define B_AX_TXDMA_ACH3_INT_EN BIT(6)
90 #define B_AX_TXDMA_ACH2_INT_EN BIT(5)
91 #define B_AX_TXDMA_ACH1_INT_EN BIT(4)
92 #define B_AX_TXDMA_ACH0_INT_EN BIT(3)
93 #define B_AX_RPQDMA_INT_EN BIT(2)
94 #define B_AX_RXP1DMA_INT_EN BIT(1)
95 #define B_AX_RXDMA_INT_EN BIT(0)
96 
97 #define R_AX_PCIE_HISR00 0x10B4
98 #define B_AX_HC00ISR_IND_INT BIT(27)
99 #define B_AX_HD1ISR_IND_INT BIT(26)
100 #define B_AX_HD0ISR_IND_INT BIT(25)
101 #define B_AX_HS0ISR_IND_INT BIT(24)
102 #define B_AX_RETRAIN_INT BIT(21)
103 #define B_AX_RPQBD_FULL_INT BIT(20)
104 #define B_AX_RDU_INT BIT(19)
105 #define B_AX_RXDMA_STUCK_INT BIT(18)
106 #define B_AX_TXDMA_STUCK_INT BIT(17)
107 #define B_AX_PCIE_HOTRST_INT BIT(16)
108 #define B_AX_PCIE_FLR_INT BIT(15)
109 #define B_AX_PCIE_PERST_INT BIT(14)
110 #define B_AX_TXDMA_CH12_INT BIT(13)
111 #define B_AX_TXDMA_CH9_INT BIT(12)
112 #define B_AX_TXDMA_CH8_INT BIT(11)
113 #define B_AX_TXDMA_ACH7_INT BIT(10)
114 #define B_AX_TXDMA_ACH6_INT BIT(9)
115 #define B_AX_TXDMA_ACH5_INT BIT(8)
116 #define B_AX_TXDMA_ACH4_INT BIT(7)
117 #define B_AX_TXDMA_ACH3_INT BIT(6)
118 #define B_AX_TXDMA_ACH2_INT BIT(5)
119 #define B_AX_TXDMA_ACH1_INT BIT(4)
120 #define B_AX_TXDMA_ACH0_INT BIT(3)
121 #define B_AX_RPQDMA_INT BIT(2)
122 #define B_AX_RXP1DMA_INT BIT(1)
123 #define B_AX_RXDMA_INT BIT(0)
124 
125 #define R_AX_PCIE_HIMR10 0x13B0
126 #define B_AX_HC10ISR_IND_INT_EN BIT(28)
127 #define B_AX_TXDMA_CH11_INT_EN BIT(12)
128 #define B_AX_TXDMA_CH10_INT_EN BIT(11)
129 
130 #define R_AX_PCIE_HISR10 0x13B4
131 #define B_AX_HC10ISR_IND_INT BIT(28)
132 #define B_AX_TXDMA_CH11_INT BIT(12)
133 #define B_AX_TXDMA_CH10_INT BIT(11)
134 
135 enum rtw_hal_status hal_get_efuse_8852be(struct rtw_phl_com_t *phl_com,
136 					 struct hal_info_t *hal);
137 
138 enum rtw_hal_status hal_init_8852be(struct rtw_phl_com_t *phl_com,
139 				    struct hal_info_t *hal);
140 
141 void hal_deinit_8852be(struct rtw_phl_com_t *phl_com,
142 		       struct hal_info_t *hal);
143 
144 enum rtw_hal_status hal_start_8852be(struct rtw_phl_com_t *phl_com,
145 				     struct hal_info_t *hal);
146 
147 enum rtw_hal_status hal_stop_8852be(struct rtw_phl_com_t *phl_com,
148 				    struct hal_info_t *hal);
149 #ifdef CONFIG_WOWLAN
150 enum rtw_hal_status hal_wow_init_8852be(struct rtw_phl_com_t *phl_com, struct hal_info_t *hal, struct rtw_phl_stainfo_t *sta);
151 enum rtw_hal_status hal_wow_deinit_8852be(struct rtw_phl_com_t *phl_com, struct hal_info_t *hal, struct rtw_phl_stainfo_t *sta);
152 #endif /* CONFIG_WOWLAN */
153 
154 enum rtw_hal_status hal_mp_init_8852be(struct rtw_phl_com_t *phl_com, struct hal_info_t *hal);
155 enum rtw_hal_status hal_mp_deinit_8852be(struct rtw_phl_com_t *phl_com, struct hal_info_t *hal);
156 
157 void hal_init_default_value_8852be(struct hal_info_t *hal, struct hal_intr_mask_cfg *cfg);
158 u32 hal_hci_cfg_8852be(struct rtw_phl_com_t *phl_com,
159 		       struct hal_info_t *hal,
160 				struct rtw_ic_info *ic_info);
161 
162 void init_hal_spec_8852be(struct rtw_phl_com_t *phl_com,
163 					struct hal_info_t *hal);
164 void hal_enable_int_8852be(struct hal_info_t *hal);
165 void hal_disable_int_8852be(struct hal_info_t *hal);
166 bool hal_recognize_int_8852be(struct hal_info_t *hal);
167 void hal_clear_int_8852be(struct hal_info_t *hal);
168 void hal_clear_int_mask_8852be(struct hal_info_t *hal);
169 void hal_restore_int_8852be(struct hal_info_t *hal);
170 u32 hal_int_hdler_8852be(struct hal_info_t *hal);
171 void hal_rx_int_restore_8852be(struct hal_info_t *hal);
172 
173 /* rtl8852BE_ops.c */
174 
175 #endif /* _RTL8852BE_HAL_H_ */
176