1 /* 2 * Copyright (c) 2025, Mediatek Inc. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef MT_SPM_RC_API_COMMON_H 8 #define MT_SPM_RC_API_COMMON_H 9 10 #include <constraints/mt_spm_trace.h> 11 #include <mt_spm_constraint.h> 12 #include <mt_spm_internal.h> 13 14 enum mt_spm_rm_rc_type { 15 MT_RM_CONSTRAINT_ID_VCORE, 16 MT_RM_CONSTRAINT_ID_BUS26, 17 MT_RM_CONSTRAINT_ID_SYSPL, 18 MT_RM_CONSTRAINT_ID_ALL = 0xff, 19 }; 20 21 enum mt_spm_rc_fp_type { 22 MT_SPM_RC_FP_INIT = 0, 23 MT_SPM_RC_FP_ENTER_START, 24 MT_SPM_RC_FP_ENTER_NOTIFY, 25 MT_SPM_RC_FP_ENTER_WAKE_SPM_BEFORE, 26 MT_SPM_RC_FP_ENTER_WAKE_SPM_AFTER, 27 MT_SPM_RC_FP_RESUME_START, 28 MT_SPM_RC_FP_RESUME_NOTIFY, 29 MT_SPM_RC_FP_RESUME_RESET_SPM_BEFORE, 30 MT_SPM_RC_FP_RESUME_BACKUP_EDGE_INT, 31 }; 32 33 #define CONSTRAINT_VCORE_ALLOW (MT_RM_CONSTRAINT_ALLOW_CPU_BUCK_OFF | \ 34 MT_RM_CONSTRAINT_ALLOW_DRAM_S0 | \ 35 MT_RM_CONSTRAINT_ALLOW_DRAM_S1 | \ 36 MT_RM_CONSTRAINT_ALLOW_VCORE_LP | \ 37 MT_RM_CONSTRAINT_ALLOW_LVTS_STATE | \ 38 MT_RM_CONSTRAINT_ALLOW_BUS26M_OFF | \ 39 MT_RM_CONSTRAINT_ALLOW_VCORE_OFF) 40 41 #define MT_SPM_RC_INFO(_cpu, _stateid, _rc_id) \ 42 ({ \ 43 MT_SPM_TRACE_COMMON_U32_WR( \ 44 MT_SPM_TRACE_COMM_RC_INFO, \ 45 (_cpu << 28) | ((_stateid & 0xffff) << 12) | \ 46 (_rc_id & 0xfff)); \ 47 }) 48 49 #define MT_SPM_RC_LAST_TIME(_time) \ 50 ({ \ 51 MT_SPM_TRACE_COMMON_U32_WR(MT_SPM_TRACE_COMM_RC_LAST_TIME_H, \ 52 (uint32_t)(_time >> 32)); \ 53 MT_SPM_TRACE_COMMON_U32_WR(MT_SPM_TRACE_COMM_RC_LAST_TIME_L, \ 54 (uint32_t)(_time & 0xffffffff)); \ 55 }) 56 57 #ifdef MT_SPM_TIMESTAMP_SUPPORT 58 #define MT_SPM_RC_TAG(_cpu, _stateid, _rc_id) \ 59 ({ \ 60 uint64_t ktime = 0; \ 61 MT_SPM_TIME_GET(ktime); \ 62 MT_SPM_RC_INFO(_cpu, _stateid, _rc_id); \ 63 (void)ktime; \ 64 MT_SPM_RC_LAST_TIME(ktime); \ 65 }) 66 67 #else 68 #define MT_SPM_RC_TAG(_cpu, _stateid, _rc_id) \ 69 MT_SPM_RC_INFO(_cpu, _stateid, _rc_id) 70 71 #endif 72 73 #define MT_SPM_RC_FP(fp) \ 74 ({ MT_SPM_TRACE_COMMON_U32_WR(MT_SPM_TRACE_COMM_RC_FP, fp); }) 75 76 #define MT_SPM_RC_TAG_VALID(_valid) \ 77 ({ MT_SPM_TRACE_COMMON_U32_WR(MT_SPM_TRACE_COMM_RC_VALID, _valid); }) 78 79 int spm_rc_constraint_status_get(uint32_t id, uint32_t type, uint32_t act, 80 enum mt_spm_rm_rc_type dest_rc_id, 81 struct constraint_status *const src, 82 struct constraint_status *const dest); 83 84 int spm_rc_constraint_status_set(uint32_t id, uint32_t type, uint32_t act, 85 enum mt_spm_rm_rc_type dest_rc_id, 86 struct constraint_status *const src, 87 struct constraint_status *const dest); 88 89 int spm_rc_constraint_valid_set(enum mt_spm_rm_rc_type id, 90 enum mt_spm_rm_rc_type dest_rc_id, 91 uint32_t valid, 92 struct constraint_status *const dest); 93 94 int spm_rc_constraint_valid_clr(enum mt_spm_rm_rc_type id, 95 enum mt_spm_rm_rc_type dest_rc_id, 96 uint32_t valid, 97 struct constraint_status *const dest); 98 99 void mt_spm_dump_pmic_warp_reg(void); 100 uint32_t spm_allow_rc_vcore(int state_id); 101 int spm_hwcg_name(uint32_t idex, char *name, size_t sz); 102 103 #ifdef MTK_PLAT_CIRQ_UNSUPPORT 104 #define do_irqs_delivery(_x, _w) 105 #else 106 void do_irqs_delivery(struct mt_irqremain *irqs, struct wake_status *wakeup); 107 #endif 108 109 #endif 110