xref: /OK3568_Linux_fs/kernel/drivers/gpu/arm/bifrost/csf/mali_kbase_csf_firmware.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 /*
3  *
4  * (C) COPYRIGHT 2018-2022 ARM Limited. All rights reserved.
5  *
6  * This program is free software and is provided to you under the terms of the
7  * GNU General Public License version 2 as published by the Free Software
8  * Foundation, and any use by you of this program is subject to the terms
9  * of such GNU license.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, you can access it online at
18  * http://www.gnu.org/licenses/gpl-2.0.html.
19  *
20  */
21 
22 #ifndef _KBASE_CSF_FIRMWARE_H_
23 #define _KBASE_CSF_FIRMWARE_H_
24 
25 #include "device/mali_kbase_device.h"
26 #include <csf/mali_kbase_csf_registers.h>
27 
28 /*
29  * PAGE_KERNEL_RO was only defined on 32bit ARM in 4.19 in:
30  * Commit a3266bd49c721e2e0a71f352d83713fbd60caadb
31  * Author: Luis R. Rodriguez <mcgrof@kernel.org>
32  * Date:   Fri Aug 17 15:46:29 2018 -0700
33  *
34  * mm: provide a fallback for PAGE_KERNEL_RO for architectures
35  *
36  * Some architectures do not define certain PAGE_KERNEL_* flags, this is
37  * either because:
38  *
39  * a) The way to implement some of these flags is *not yet ported*, or
40  * b) The architecture *has no way* to describe them
41  *
42  * [snip]
43  *
44  * This can be removed once support of 32bit ARM kernels predating 4.19 is no
45  * longer required.
46  */
47 #ifndef PAGE_KERNEL_RO
48 #define PAGE_KERNEL_RO PAGE_KERNEL
49 #endif
50 
51 /* Address space number to claim for the firmware. */
52 #define MCU_AS_NR 0
53 #define MCU_AS_BITMASK (1 << MCU_AS_NR)
54 
55 /* Number of available Doorbells */
56 #define CSF_NUM_DOORBELL ((u8)24)
57 
58 /* Offset to the first HW doorbell page */
59 #define CSF_HW_DOORBELL_PAGE_OFFSET ((u32)0x80000)
60 
61 /* Size of HW Doorbell page, used to calculate the offset to subsequent pages */
62 #define CSF_HW_DOORBELL_PAGE_SIZE ((u32)0x10000)
63 
64 /* Doorbell 0 is used by the driver. */
65 #define CSF_KERNEL_DOORBELL_NR ((u32)0)
66 
67 /* Offset of name inside a trace buffer entry in the firmware image */
68 #define TRACE_BUFFER_ENTRY_NAME_OFFSET (0x1C)
69 
70 /* All implementations of the host interface with major version 0 must comply
71  * with these restrictions:
72  */
73 /* GLB_GROUP_NUM: At least 3 CSGs, but no more than 31 */
74 #define MIN_SUPPORTED_CSGS 3
75 #define MAX_SUPPORTED_CSGS 31
76 /* GROUP_STREAM_NUM: At least 8 CSs per CSG, but no more than 32 */
77 #define MIN_SUPPORTED_STREAMS_PER_GROUP 8
78 /* MAX_SUPPORTED_STREAMS_PER_GROUP: Maximum CSs per csg. */
79 #define MAX_SUPPORTED_STREAMS_PER_GROUP 32
80 
81 struct kbase_device;
82 
83 
84 /**
85  * struct kbase_csf_mapping - Memory mapping for CSF memory.
86  * @phys:      Physical memory allocation used by the mapping.
87  * @cpu_addr:  Starting CPU address for the mapping.
88  * @va_reg:    GPU virtual address region for the mapping.
89  * @num_pages: Size of the mapping, in memory pages.
90  */
91 struct kbase_csf_mapping {
92 	struct tagged_addr *phys;
93 	void *cpu_addr;
94 	struct kbase_va_region *va_reg;
95 	unsigned int num_pages;
96 };
97 
98 /**
99  * struct kbase_csf_trace_buffers - List and state of firmware trace buffers.
100  * @list:       List of trace buffers descriptors.
101  * @mcu_rw:     Metadata for the MCU shared memory mapping used for
102  *              GPU-readable,writable/CPU-writable variables.
103  * @mcu_write:  Metadata for the MCU shared memory mapping used for
104  *              GPU-writable/CPU-readable variables.
105  */
106 struct kbase_csf_trace_buffers {
107 	struct list_head list;
108 	struct kbase_csf_mapping mcu_rw;
109 	struct kbase_csf_mapping mcu_write;
110 };
111 
112 /**
113  * struct kbase_csf_cmd_stream_info - CSI provided by the firmware.
114  *
115  * @kbdev: Address of the instance of a GPU platform device that implements
116  *         this interface.
117  * @features: Bit field of CS features (e.g. which types of jobs
118  *            are supported). Bits 7:0 specify the number of work registers(-1).
119  *            Bits 11:8 specify the number of scoreboard entries(-1).
120  * @input: Address of CSI input page.
121  * @output: Address of CSI output page.
122  */
123 struct kbase_csf_cmd_stream_info {
124 	struct kbase_device *kbdev;
125 	u32 features;
126 	void *input;
127 	void *output;
128 };
129 
130 /**
131  * kbase_csf_firmware_cs_input() - Set a word in a CS's input page
132  *
133  * @info: CSI provided by the firmware.
134  * @offset: Offset of the word to be written, in bytes.
135  * @value: Value to be written.
136  */
137 void kbase_csf_firmware_cs_input(
138 	const struct kbase_csf_cmd_stream_info *info, u32 offset, u32 value);
139 
140 /**
141  * kbase_csf_firmware_cs_input_read() - Read a word in a CS's input page
142  *
143  * Return: Value of the word read from the CS's input page.
144  *
145  * @info: CSI provided by the firmware.
146  * @offset: Offset of the word to be read, in bytes.
147  */
148 u32 kbase_csf_firmware_cs_input_read(
149 	const struct kbase_csf_cmd_stream_info *const info, const u32 offset);
150 
151 /**
152  * kbase_csf_firmware_cs_input_mask() - Set part of a word in a CS's input page
153  *
154  * @info: CSI provided by the firmware.
155  * @offset: Offset of the word to be modified, in bytes.
156  * @value: Value to be written.
157  * @mask: Bitmask with the bits to be modified set.
158  */
159 void kbase_csf_firmware_cs_input_mask(
160 	const struct kbase_csf_cmd_stream_info *info, u32 offset,
161 	u32 value, u32 mask);
162 
163 /**
164  * kbase_csf_firmware_cs_output() - Read a word in a CS's output page
165  *
166  * Return: Value of the word read from the CS's output page.
167  *
168  * @info: CSI provided by the firmware.
169  * @offset: Offset of the word to be read, in bytes.
170  */
171 u32 kbase_csf_firmware_cs_output(
172 	const struct kbase_csf_cmd_stream_info *info, u32 offset);
173 /**
174  * struct kbase_csf_cmd_stream_group_info - CSG interface provided by the
175  *                                          firmware.
176  *
177  * @kbdev: Address of the instance of a GPU platform device that implements
178  *         this interface.
179  * @features: Bit mask of features. Reserved bits should be 0, and should
180  *            be ignored.
181  * @input: Address of global interface input page.
182  * @output: Address of global interface output page.
183  * @suspend_size: Size in bytes for normal suspend buffer for the CSG
184  * @protm_suspend_size: Size in bytes for protected mode suspend buffer
185  *                      for the CSG.
186  * @stream_num: Number of CSs in the CSG.
187  * @stream_stride: Stride in bytes in JASID0 virtual address between
188  *                 CS capability structures.
189  * @streams: Address of an array of CS capability structures.
190  */
191 struct kbase_csf_cmd_stream_group_info {
192 	struct kbase_device *kbdev;
193 	u32 features;
194 	void *input;
195 	void *output;
196 	u32 suspend_size;
197 	u32 protm_suspend_size;
198 	u32 stream_num;
199 	u32 stream_stride;
200 	struct kbase_csf_cmd_stream_info *streams;
201 };
202 
203 /**
204  * kbase_csf_firmware_csg_input() - Set a word in a CSG's input page
205  *
206  * @info: CSG interface provided by the firmware.
207  * @offset: Offset of the word to be written, in bytes.
208  * @value: Value to be written.
209  */
210 void kbase_csf_firmware_csg_input(
211 	const struct kbase_csf_cmd_stream_group_info *info, u32 offset,
212 	u32 value);
213 
214 /**
215  * kbase_csf_firmware_csg_input_read() - Read a word in a CSG's input page
216  *
217  * Return: Value of the word read from the CSG's input page.
218  *
219  * @info: CSG interface provided by the firmware.
220  * @offset: Offset of the word to be read, in bytes.
221  */
222 u32 kbase_csf_firmware_csg_input_read(
223 	const struct kbase_csf_cmd_stream_group_info *info, u32 offset);
224 
225 /**
226  * kbase_csf_firmware_csg_input_mask() - Set part of a word in a CSG's
227  *                                       input page
228  *
229  * @info: CSG interface provided by the firmware.
230  * @offset: Offset of the word to be modified, in bytes.
231  * @value: Value to be written.
232  * @mask: Bitmask with the bits to be modified set.
233  */
234 void kbase_csf_firmware_csg_input_mask(
235 	const struct kbase_csf_cmd_stream_group_info *info, u32 offset,
236 	u32 value, u32 mask);
237 
238 /**
239  * kbase_csf_firmware_csg_output()- Read a word in a CSG's output page
240  *
241  * Return: Value of the word read from the CSG's output page.
242  *
243  * @info: CSG interface provided by the firmware.
244  * @offset: Offset of the word to be read, in bytes.
245  */
246 u32 kbase_csf_firmware_csg_output(
247 	const struct kbase_csf_cmd_stream_group_info *info, u32 offset);
248 
249 /**
250  * struct kbase_csf_global_iface - Global CSF interface
251  *                                 provided by the firmware.
252  *
253  * @kbdev: Address of the instance of a GPU platform device that implements
254  *         this interface.
255  * @version: Bits 31:16 hold the major version number and 15:0 hold the minor
256  *           version number. A higher minor version is backwards-compatible
257  *           with a lower minor version for the same major version.
258  * @features: Bit mask of features (e.g. whether certain types of job can
259  *            be suspended). Reserved bits should be 0, and should be ignored.
260  * @input: Address of global interface input page.
261  * @output: Address of global interface output page.
262  * @group_num: Number of CSGs supported.
263  * @group_stride: Stride in bytes in JASID0 virtual address between
264  *                CSG capability structures.
265  * @prfcnt_size: Performance counters size.
266  * @instr_features: Instrumentation features. (csf >= 1.1.0)
267  * @groups: Address of an array of CSG capability structures.
268  */
269 struct kbase_csf_global_iface {
270 	struct kbase_device *kbdev;
271 	u32 version;
272 	u32 features;
273 	void *input;
274 	void *output;
275 	u32 group_num;
276 	u32 group_stride;
277 	u32 prfcnt_size;
278 	u32 instr_features;
279 	struct kbase_csf_cmd_stream_group_info *groups;
280 };
281 
282 /**
283  * kbase_csf_firmware_global_input() - Set a word in the global input page
284  *
285  * @iface: CSF interface provided by the firmware.
286  * @offset: Offset of the word to be written, in bytes.
287  * @value: Value to be written.
288  */
289 void kbase_csf_firmware_global_input(
290 	const struct kbase_csf_global_iface *iface, u32 offset, u32 value);
291 
292 /**
293  * kbase_csf_firmware_global_input_mask() - Set part of a word in the global
294  *                                          input page
295  *
296  * @iface: CSF interface provided by the firmware.
297  * @offset: Offset of the word to be modified, in bytes.
298  * @value: Value to be written.
299  * @mask: Bitmask with the bits to be modified set.
300  */
301 void kbase_csf_firmware_global_input_mask(
302 	const struct kbase_csf_global_iface *iface, u32 offset,
303 	u32 value, u32 mask);
304 
305 /**
306  * kbase_csf_firmware_global_input_read() - Read a word in a global input page
307  *
308  * Return: Value of the word read from the global input page.
309  *
310  * @info: CSG interface provided by the firmware.
311  * @offset: Offset of the word to be read, in bytes.
312  */
313 u32 kbase_csf_firmware_global_input_read(
314 	const struct kbase_csf_global_iface *info, u32 offset);
315 
316 /**
317  * kbase_csf_firmware_global_output() - Read a word in the global output page
318  *
319  * Return: Value of the word read from the global output page.
320  *
321  * @iface: CSF interface provided by the firmware.
322  * @offset: Offset of the word to be read, in bytes.
323  */
324 u32 kbase_csf_firmware_global_output(
325 	const struct kbase_csf_global_iface *iface, u32 offset);
326 
327 /**
328  * kbase_csf_ring_doorbell() - Ring the doorbell
329  *
330  * @kbdev:       An instance of the GPU platform device
331  * @doorbell_nr: Index of the HW doorbell page
332  */
333 void kbase_csf_ring_doorbell(struct kbase_device *kbdev, int doorbell_nr);
334 
335 /**
336  * kbase_csf_read_firmware_memory - Read a value in a GPU address
337  *
338  * @kbdev:     Device pointer
339  * @gpu_addr:  GPU address to read
340  * @value:     output pointer to which the read value will be written.
341  *
342  * This function read a value in a GPU address that belongs to
343  * a private firmware memory region. The function assumes that the location
344  * is not permanently mapped on the CPU address space, therefore it maps it
345  * and then unmaps it to access it independently.
346  */
347 void kbase_csf_read_firmware_memory(struct kbase_device *kbdev,
348 	u32 gpu_addr, u32 *value);
349 
350 /**
351  * kbase_csf_update_firmware_memory - Write a value in a GPU address
352  *
353  * @kbdev:     Device pointer
354  * @gpu_addr:  GPU address to write
355  * @value:     Value to write
356  *
357  * This function writes a given value in a GPU address that belongs to
358  * a private firmware memory region. The function assumes that the destination
359  * is not permanently mapped on the CPU address space, therefore it maps it
360  * and then unmaps it to access it independently.
361  */
362 void kbase_csf_update_firmware_memory(struct kbase_device *kbdev,
363 	u32 gpu_addr, u32 value);
364 
365 /**
366  * kbase_csf_read_firmware_memory_exe - Read a value in a GPU address in the
367  *                                      region of its final execution location.
368  *
369  * @kbdev:     Device pointer
370  * @gpu_addr:  GPU address to read
371  * @value:     Output pointer to which the read value will be written
372  *
373  * This function read a value in a GPU address that belongs to a private loaded
374  * firmware memory region based on its final execution location. The function
375  * assumes that the location is not permanently mapped on the CPU address space,
376  * therefore it maps it and then unmaps it to access it independently. This function
377  * needs to be used when accessing firmware memory regions which will be moved to
378  * their final execution location during firmware boot using an address based on the
379  * final execution location.
380  */
381 void kbase_csf_read_firmware_memory_exe(struct kbase_device *kbdev,
382 	u32 gpu_addr, u32 *value);
383 
384 /**
385  * kbase_csf_update_firmware_memory_exe - Write a value in a GPU address in the
386  *                                        region of its final execution location.
387  *
388  * @kbdev:     Device pointer
389  * @gpu_addr:  GPU address to write
390  * @value:     Value to write
391  *
392  * This function writes a value in a GPU address that belongs to a private loaded
393  * firmware memory region based on its final execution location. The function
394  * assumes that the location is not permanently mapped on the CPU address space,
395  * therefore it maps it and then unmaps it to access it independently. This function
396  * needs to be used when accessing firmware memory regions which will be moved to
397  * their final execution location during firmware boot using an address based on the
398  * final execution location.
399  */
400 void kbase_csf_update_firmware_memory_exe(struct kbase_device *kbdev,
401 	u32 gpu_addr, u32 value);
402 
403 /**
404  * kbase_csf_firmware_early_init() - Early initialization for the firmware.
405  * @kbdev: Kbase device
406  *
407  * Initialize resources related to the firmware. Must be called at kbase probe.
408  *
409  * Return: 0 if successful, negative error code on failure
410  */
411 int kbase_csf_firmware_early_init(struct kbase_device *kbdev);
412 
413 /**
414  * kbase_csf_firmware_early_term() - Terminate resources related to the firmware
415  *                                   after the firmware unload has been done.
416  *
417  * @kbdev: Device pointer
418  *
419  * This should be called only when kbase probe fails or gets rmmoded.
420  */
421 void kbase_csf_firmware_early_term(struct kbase_device *kbdev);
422 
423 /**
424  * kbase_csf_firmware_late_init() - Late initialization for the firmware.
425  * @kbdev: Kbase device
426  *
427  * Initialize resources related to the firmware. But must be called after
428  * backend late init is done. Must be used at probe time only.
429  *
430  * Return: 0 if successful, negative error code on failure
431  */
432 int kbase_csf_firmware_late_init(struct kbase_device *kbdev);
433 
434 /**
435  * kbase_csf_firmware_load_init() - Load the firmware for the CSF MCU
436  * @kbdev: Kbase device
437  *
438  * Request the firmware from user space and load it into memory.
439  *
440  * Return: 0 if successful, negative error code on failure
441  */
442 int kbase_csf_firmware_load_init(struct kbase_device *kbdev);
443 
444 /**
445  * kbase_csf_firmware_unload_term() - Unload the firmware
446  * @kbdev: Kbase device
447  *
448  * Frees the memory allocated by kbase_csf_firmware_load_init()
449  */
450 void kbase_csf_firmware_unload_term(struct kbase_device *kbdev);
451 
452 #if IS_ENABLED(CONFIG_MALI_CORESIGHT)
453 /**
454  * kbase_csf_firmware_mcu_register_write - Write to MCU register
455  *
456  * @kbdev:    Instance of a gpu platform device that implements a csf interface.
457  * @reg_addr: Register address to write into
458  * @reg_val:  Value to be written
459  *
460  * Write a desired value to a register in MCU address space.
461  *
462  * return: 0 on success, or negative on failure.
463  */
464 int kbase_csf_firmware_mcu_register_write(struct kbase_device *const kbdev, u32 const reg_addr,
465 					  u32 const reg_val);
466 /**
467  * kbase_csf_firmware_mcu_register_read - Read from MCU register
468  *
469  * @kbdev:    Instance of a gpu platform device that implements a csf interface.
470  * @reg_addr: Register address to read from
471  * @reg_val:  Value as present in reg_addr register
472  *
473  * Read a value from MCU address space.
474  *
475  * return: 0 on success, or negative on failure.
476  */
477 int kbase_csf_firmware_mcu_register_read(struct kbase_device *const kbdev, u32 const reg_addr,
478 					 u32 *reg_val);
479 
480 /**
481  * kbase_csf_firmware_mcu_register_poll - Poll MCU register
482  *
483  * @kbdev:    Instance of a gpu platform device that implements a csf interface.
484  * @reg_addr: Register address to read from
485  * @val_mask: Value to mask the read value for comparison
486  * @reg_val:  Value to be compared against
487  *
488  * Continue to read a value from MCU address space until it matches given mask and value.
489  *
490  * return: 0 on success, or negative on failure.
491  */
492 int kbase_csf_firmware_mcu_register_poll(struct kbase_device *const kbdev, u32 const reg_addr,
493 					 u32 const val_mask, u32 const reg_val);
494 #endif /* IS_ENABLED(CONFIG_MALI_CORESIGHT) */
495 
496 /**
497  * kbase_csf_firmware_ping - Send the ping request to firmware.
498  *
499  * @kbdev: Instance of a GPU platform device that implements a CSF interface.
500  *
501  * The function sends the ping request to firmware.
502  */
503 void kbase_csf_firmware_ping(struct kbase_device *kbdev);
504 
505 /**
506  * kbase_csf_firmware_ping_wait - Send the ping request to firmware and waits.
507  *
508  * @kbdev: Instance of a GPU platform device that implements a CSF interface.
509  * @wait_timeout_ms: Timeout to get the acknowledgment for PING request from FW.
510  *
511  * The function sends the ping request to firmware and waits to confirm it is
512  * alive.
513  *
514  * Return: 0 on success, or negative on failure.
515  */
516 int kbase_csf_firmware_ping_wait(struct kbase_device *kbdev, unsigned int wait_timeout_ms);
517 
518 /**
519  * kbase_csf_firmware_set_timeout - Set a hardware endpoint progress timeout.
520  *
521  * @kbdev:   Instance of a GPU platform device that implements a CSF interface.
522  * @timeout: The maximum number of GPU cycles that is allowed to elapse
523  *           without forward progress before the driver terminates a GPU
524  *           command queue group.
525  *
526  * Configures the progress timeout value used by the firmware to decide
527  * when to report that a task is not making progress on an endpoint.
528  *
529  * Return: 0 on success, or negative on failure.
530  */
531 int kbase_csf_firmware_set_timeout(struct kbase_device *kbdev, u64 timeout);
532 
533 /**
534  * kbase_csf_enter_protected_mode - Send the Global request to firmware to
535  *                                  enter protected mode.
536  *
537  * @kbdev: Instance of a GPU platform device that implements a CSF interface.
538  *
539  * The function must be called with kbdev->csf.scheduler.interrupt_lock held
540  * and it does not wait for the protected mode entry to complete.
541  */
542 void kbase_csf_enter_protected_mode(struct kbase_device *kbdev);
543 
544 /**
545  * kbase_csf_wait_protected_mode_enter - Wait for the completion of PROTM_ENTER
546  *                                       Global request sent to firmware.
547  *
548  * @kbdev: Instance of a GPU platform device that implements a CSF interface.
549  *
550  * This function needs to be called after kbase_csf_enter_protected_mode() to
551  * wait for the GPU to actually enter protected mode. GPU reset is triggered if
552  * the wait is unsuccessful.
553  *
554  * Return: 0 on success, or negative on failure.
555  */
556 int kbase_csf_wait_protected_mode_enter(struct kbase_device *kbdev);
557 
kbase_csf_firmware_mcu_halted(struct kbase_device * kbdev)558 static inline bool kbase_csf_firmware_mcu_halted(struct kbase_device *kbdev)
559 {
560 #if IS_ENABLED(CONFIG_MALI_BIFROST_NO_MALI)
561 	return true;
562 #else
563 	return (kbase_reg_read(kbdev, GPU_CONTROL_REG(MCU_STATUS)) ==
564 		MCU_STATUS_HALTED);
565 #endif /* CONFIG_MALI_BIFROST_NO_MALI */
566 }
567 
568 /**
569  * kbase_csf_firmware_trigger_mcu_halt - Send the Global request to firmware to
570  *                                       halt its operation and bring itself
571  *                                       into a known internal state for warm
572  *                                       boot later.
573  *
574  * @kbdev: Instance of a GPU platform device that implements a CSF interface.
575  */
576 void kbase_csf_firmware_trigger_mcu_halt(struct kbase_device *kbdev);
577 
578 /**
579  * kbase_csf_firmware_enable_mcu - Send the command to enable MCU
580  *
581  * @kbdev: Instance of a GPU platform device that implements a CSF interface.
582  */
583 void kbase_csf_firmware_enable_mcu(struct kbase_device *kbdev);
584 
585 /**
586  * kbase_csf_firmware_disable_mcu - Send the command to disable MCU
587  *
588  * @kbdev: Instance of a GPU platform device that implements a CSF interface.
589  */
590 void kbase_csf_firmware_disable_mcu(struct kbase_device *kbdev);
591 
592 /**
593  * kbase_csf_firmware_disable_mcu_wait - Wait for the MCU to reach disabled
594  *                                       status.
595  *
596  * @kbdev: Instance of a GPU platform device that implements a CSF interface.
597  */
598 void kbase_csf_firmware_disable_mcu_wait(struct kbase_device *kbdev);
599 
600 #ifdef KBASE_PM_RUNTIME
601 /**
602  * kbase_csf_firmware_trigger_mcu_sleep - Send the command to put MCU in sleep
603  *                                        state.
604  *
605  * @kbdev: Instance of a GPU platform device that implements a CSF interface.
606  */
607 void kbase_csf_firmware_trigger_mcu_sleep(struct kbase_device *kbdev);
608 
609 /**
610  * kbase_csf_firmware_is_mcu_in_sleep - Check if sleep request has completed
611  *                                      and MCU has halted.
612  *
613  * @kbdev: Instance of a GPU platform device that implements a CSF interface.
614  *
615  * Return: true if sleep request has completed, otherwise false.
616  */
617 bool kbase_csf_firmware_is_mcu_in_sleep(struct kbase_device *kbdev);
618 #endif
619 
620 /**
621  * kbase_csf_firmware_trigger_reload() - Trigger the reboot of MCU firmware, for
622  *                                       the cold boot case firmware image would
623  *                                       be reloaded from filesystem into memory.
624  *
625  * @kbdev: Instance of a GPU platform device that implements a CSF interface.
626  */
627 void kbase_csf_firmware_trigger_reload(struct kbase_device *kbdev);
628 
629 /**
630  * kbase_csf_firmware_reload_completed - The reboot of MCU firmware has
631  *                                       completed.
632  *
633  * @kbdev: Instance of a GPU platform device that implements a CSF interface.
634  */
635 void kbase_csf_firmware_reload_completed(struct kbase_device *kbdev);
636 
637 /**
638  * kbase_csf_firmware_global_reinit - Send the Global configuration requests
639  *                                    after the reboot of MCU firmware.
640  *
641  * @kbdev: Instance of a GPU platform device that implements a CSF interface.
642  * @core_mask: Mask of the enabled shader cores.
643  */
644 void kbase_csf_firmware_global_reinit(struct kbase_device *kbdev,
645 				      u64 core_mask);
646 
647 /**
648  * kbase_csf_firmware_global_reinit_complete - Check the Global configuration
649  *                      requests, sent after the reboot of MCU firmware, have
650  *                      completed or not.
651  *
652  * @kbdev: Instance of a GPU platform device that implements a CSF interface.
653  *
654  * Return: true if the Global configuration requests completed otherwise false.
655  */
656 bool kbase_csf_firmware_global_reinit_complete(struct kbase_device *kbdev);
657 
658 /**
659  * kbase_csf_firmware_update_core_attr - Send the Global configuration request
660  *                                       to update the requested core attribute
661  *                                       changes.
662  *
663  * @kbdev: Instance of a GPU platform device that implements a CSF interface.
664  * @update_core_pwroff_timer: If true, signal the firmware needs to update
665  *                            the MCU power-off timer value.
666  * @update_core_mask:         If true, need to do the core_mask update with
667  *                            the supplied core_mask value.
668  * @core_mask:                New core mask value if update_core_mask is true,
669  *                            otherwise unused.
670  */
671 void kbase_csf_firmware_update_core_attr(struct kbase_device *kbdev,
672 		bool update_core_pwroff_timer, bool update_core_mask, u64 core_mask);
673 
674 /**
675  * kbase_csf_firmware_core_attr_updated - Check the Global configuration
676  *                  request has completed or not, that was sent to update
677  *                  the core attributes.
678  *
679  * @kbdev: Instance of a GPU platform device that implements a CSF interface.
680  *
681  * Return: true if the Global configuration request to update the core
682  *         attributes has completed, otherwise false.
683  */
684 bool kbase_csf_firmware_core_attr_updated(struct kbase_device *kbdev);
685 
686 /**
687  * kbase_csf_firmware_get_glb_iface - Request the global control block of CSF
688  *                                      interface capabilities
689  *
690  * @kbdev:                 Kbase device.
691  * @group_data:            Pointer where to store all the group data
692  *                         (sequentially).
693  * @max_group_num:         The maximum number of groups to be read.
694  *                         Can be 0, in which case group_data is unused.
695  * @stream_data:           Pointer where to store all the CS data
696  *                         (sequentially).
697  * @max_total_stream_num:  The maximum number of CSs to be read.
698  *                         Can be 0, in which case stream_data is unused.
699  * @glb_version:           Where to store the global interface version.
700  * @features:              Where to store a bit mask of features (e.g.
701  *                         whether certain types of job can be suspended).
702  * @group_num:             Where to store the number of CSGs
703  *                         supported.
704  * @prfcnt_size:           Where to store the size of CSF performance counters,
705  *                         in bytes. Bits 31:16 hold the size of firmware
706  *                         performance counter data and 15:0 hold the size of
707  *                         hardware performance counter data.
708  * @instr_features:        Instrumentation features. Bits 7:4 hold the max size
709  *                         of events. Bits 3:0 hold the offset update rate.
710  *                         (csf >= 1,1,0)
711  *
712  * Return: Total number of CSs, summed across all groups.
713  */
714 u32 kbase_csf_firmware_get_glb_iface(
715 	struct kbase_device *kbdev, struct basep_cs_group_control *group_data,
716 	u32 max_group_num, struct basep_cs_stream_control *stream_data,
717 	u32 max_total_stream_num, u32 *glb_version, u32 *features,
718 	u32 *group_num, u32 *prfcnt_size, u32 *instr_features);
719 
720 /**
721  * kbase_csf_firmware_get_timeline_metadata - Get CSF firmware header timeline
722  *                                            metadata content
723  *
724  * @kbdev:        Kbase device.
725  * @name:         Name of the metadata which metadata content to be returned.
726  * @size:         Metadata size if specified metadata found.
727  *
728  * Return: The firmware timeline metadata content which match @p name.
729  */
730 const char *kbase_csf_firmware_get_timeline_metadata(struct kbase_device *kbdev,
731 	const char *name, size_t *size);
732 
733 /**
734  * kbase_csf_firmware_mcu_shared_mapping_init - Allocate and map MCU shared memory.
735  *
736  * @kbdev:              Kbase device the memory mapping shall belong to.
737  * @num_pages:          Number of memory pages to map.
738  * @cpu_map_properties: Either PROT_READ or PROT_WRITE.
739  * @gpu_map_properties: Either KBASE_REG_GPU_RD or KBASE_REG_GPU_WR.
740  * @csf_mapping:        Object where to write metadata for the memory mapping.
741  *
742  * This helper function allocates memory and maps it on both the CPU
743  * and the GPU address spaces. Most of the properties of the mapping
744  * are implicit and will be automatically determined by the function,
745  * e.g. whether memory is cacheable.
746  *
747  * The client is only expected to specify whether the mapping is readable
748  * or writable in the CPU and the GPU address spaces; any other flag
749  * will be ignored by the function.
750  *
751  * Return: 0 if success, or an error code on failure.
752  */
753 int kbase_csf_firmware_mcu_shared_mapping_init(
754 		struct kbase_device *kbdev,
755 		unsigned int num_pages,
756 		unsigned long cpu_map_properties,
757 		unsigned long gpu_map_properties,
758 		struct kbase_csf_mapping *csf_mapping);
759 
760 /**
761  * kbase_csf_firmware_mcu_shared_mapping_term - Unmap and free MCU shared memory.
762  *
763  * @kbdev:       Device pointer.
764  * @csf_mapping: Metadata of the memory mapping to terminate.
765  */
766 void kbase_csf_firmware_mcu_shared_mapping_term(
767 		struct kbase_device *kbdev, struct kbase_csf_mapping *csf_mapping);
768 
769 #ifdef CONFIG_MALI_BIFROST_DEBUG
770 extern bool fw_debug;
771 #endif
772 
kbase_csf_timeout_in_jiffies(const unsigned int msecs)773 static inline long kbase_csf_timeout_in_jiffies(const unsigned int msecs)
774 {
775 #ifdef CONFIG_MALI_BIFROST_DEBUG
776 	return (fw_debug ? MAX_SCHEDULE_TIMEOUT : msecs_to_jiffies(msecs));
777 #else
778 	return msecs_to_jiffies(msecs);
779 #endif
780 }
781 
782 /**
783  * kbase_csf_firmware_enable_gpu_idle_timer() - Activate the idle hysteresis
784  *                                              monitoring operation
785  *
786  * @kbdev: Kbase device structure
787  *
788  * Program the firmware interface with its configured hysteresis count value
789  * and enable the firmware to act on it. The Caller is
790  * assumed to hold the kbdev->csf.scheduler.interrupt_lock.
791  */
792 void kbase_csf_firmware_enable_gpu_idle_timer(struct kbase_device *kbdev);
793 
794 /**
795  * kbase_csf_firmware_disable_gpu_idle_timer() - Disable the idle time
796  *                                             hysteresis monitoring operation
797  *
798  * @kbdev: Kbase device structure
799  *
800  * Program the firmware interface to disable the idle hysteresis timer. The
801  * Caller is assumed to hold the kbdev->csf.scheduler.interrupt_lock.
802  */
803 void kbase_csf_firmware_disable_gpu_idle_timer(struct kbase_device *kbdev);
804 
805 /**
806  * kbase_csf_firmware_get_gpu_idle_hysteresis_time - Get the firmware GPU idle
807  *                                               detection hysteresis duration
808  *
809  * @kbdev: Instance of a GPU platform device that implements a CSF interface.
810  *
811  * Return: the internally recorded hysteresis (nominal) value.
812  */
813 u32 kbase_csf_firmware_get_gpu_idle_hysteresis_time(struct kbase_device *kbdev);
814 
815 /**
816  * kbase_csf_firmware_set_gpu_idle_hysteresis_time - Set the firmware GPU idle
817  *                                               detection hysteresis duration
818  *
819  * @kbdev: Instance of a GPU platform device that implements a CSF interface.
820  * @dur:     The duration value (unit: milliseconds) for the configuring
821  *           hysteresis field for GPU idle detection
822  *
823  * The supplied value will be recorded internally without any change. But the
824  * actual field value will be subject to hysteresis source frequency scaling
825  * and maximum value limiting. The default source will be SYSTEM_TIMESTAMP
826  * counter. But in case the platform is not able to supply it, the GPU
827  * CYCLE_COUNTER source will be used as an alternative. Bit-31 on the
828  * returned value is the source configuration flag, and it is set to '1'
829  * when CYCLE_COUNTER alternative source is used.
830  *
831  * Return: the actual internally configured hysteresis field value.
832  */
833 u32 kbase_csf_firmware_set_gpu_idle_hysteresis_time(struct kbase_device *kbdev, u32 dur);
834 
835 /**
836  * kbase_csf_firmware_get_mcu_core_pwroff_time - Get the MCU shader Core power-off
837  *                                               time value
838  *
839  * @kbdev:   Instance of a GPU platform device that implements a CSF interface.
840  *
841  * Return: the internally recorded MCU shader Core power-off (nominal) timeout value. The unit
842  *         of the value is in micro-seconds.
843  */
844 u32 kbase_csf_firmware_get_mcu_core_pwroff_time(struct kbase_device *kbdev);
845 
846 /**
847  * kbase_csf_firmware_set_mcu_core_pwroff_time - Set the MCU shader Core power-off
848  *                                               time value
849  *
850  * @kbdev:   Instance of a GPU platform device that implements a CSF interface.
851  * @dur:     The duration value (unit: micro-seconds) for configuring MCU
852  *           core power-off timer, when the shader cores' power
853  *           transitions are delegated to the MCU (normal operational
854  *           mode)
855  *
856  * The supplied value will be recorded internally without any change. But the
857  * actual field value will be subject to core power-off timer source frequency
858  * scaling and maximum value limiting. The default source will be
859  * SYSTEM_TIMESTAMP counter. But in case the platform is not able to supply it,
860  * the GPU CYCLE_COUNTER source will be used as an alternative. Bit-31 on the
861  * returned value is the source configuration flag, and it is set to '1'
862  * when CYCLE_COUNTER alternative source is used.
863  *
864  * The configured MCU shader Core power-off timer will only have effect when the host
865  * driver has delegated the shader cores' power management to MCU.
866  *
867  * Return: the actual internal core power-off timer value in register defined
868  *         format.
869  */
870 u32 kbase_csf_firmware_set_mcu_core_pwroff_time(struct kbase_device *kbdev, u32 dur);
871 
872 /**
873  * kbase_csf_interface_version - Helper function to build the full firmware
874  *                               interface version in a format compatible with
875  *                               GLB_VERSION register
876  *
877  * @major:     major version of csf interface
878  * @minor:     minor version of csf interface
879  * @patch:     patch version of csf interface
880  *
881  * Return: firmware interface version
882  */
kbase_csf_interface_version(u32 major,u32 minor,u32 patch)883 static inline u32 kbase_csf_interface_version(u32 major, u32 minor, u32 patch)
884 {
885 	return ((major << GLB_VERSION_MAJOR_SHIFT) |
886 		(minor << GLB_VERSION_MINOR_SHIFT) |
887 		(patch << GLB_VERSION_PATCH_SHIFT));
888 }
889 
890 /**
891  * kbase_csf_trigger_firmware_config_update - Send a firmware config update.
892  *
893  * @kbdev: Instance of a GPU platform device that implements a CSF interface.
894  *
895  * Any changes done to firmware configuration entry or tracebuffer entry
896  * requires a GPU silent reset to reflect the configuration changes
897  * requested, but if Firmware.header.entry.bit(30) is set then we can request a
898  * FIRMWARE_CONFIG_UPDATE rather than doing a silent reset.
899  *
900  * Return: 0 if success, or negative error code on failure.
901  */
902 int kbase_csf_trigger_firmware_config_update(struct kbase_device *kbdev);
903 
904 /**
905  * kbase_csf_firmware_req_core_dump - Request a firmware core dump
906  *
907  * @kbdev: Instance of a GPU platform device that implements a CSF interface.
908  *
909  * Request a firmware core dump and wait for for firmware to acknowledge.
910  * Firmware will enter infinite loop after the firmware core dump is created.
911  *
912  * Return: 0 if success, or negative error code on failure.
913  */
914 int kbase_csf_firmware_req_core_dump(struct kbase_device *const kbdev);
915 
916 #endif
917