xref: /OK3568_Linux_fs/kernel/include/linux/platform_data/spi-rockchip.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1 /* include/linux/platform_data/spi-rockchip.h
2  *
3  * Copyright (C) 2014 Rockchip Electronics Ltd.
4  *	luowei <lw@rock-chips.com>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10 
11 #ifndef __ROCKCHIP_PLAT_SPI_H
12 #define __ROCKCHIP_PLAT_SPI_H
13 
14 #include <linux/dmaengine.h>
15 
16 struct platform_device;
17 
18 /**
19  * struct rockchip_spi_csinfo - ChipSelect description
20  * @fb_delay: Slave specific feedback delay.
21  *            Refer to FB_CLK_SEL register definition in SPI chapter.
22  * @line: Custom 'identity' of the CS line.
23  *
24  * This is per SPI-Slave Chipselect information.
25  * Allocate and initialize one in machine init code and make the
26  * spi_board_info.controller_data point to it.
27  */
28 struct rockchip_spi_csinfo {
29 	u8 fb_delay;
30 	unsigned line;
31 };
32 
33 /**
34  * struct rockchip_spi_info - SPI Controller defining structure
35  * @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field.
36  * @num_cs: Number of CS this controller emulates.
37  * @cfg_gpio: Configure pins for this SPI controller.
38  */
39 struct rockchip_spi_info {
40 	int src_clk_nr;
41 	int spi_freq;
42 	int num_cs;
43 	int bus_num;
44 	int (*cfg_gpio)(void);
45 	dma_filter_fn filter;
46 
47 	u8 transfer_mode;/*full or half duplex*/
48 	u8 poll_mode;	/* 0 for contoller polling mode */
49 	u8 type;	/* SPI/SSP/Micrwire */
50 	u8 enable_dma;
51 	u8 slave_enable;
52 };
53 
54 /**
55  * rockchip_spi_set_platdata - SPI Controller configure callback by the board
56  *				initialization code.
57  * @cfg_gpio: Pointer to gpio setup function.
58  * @src_clk_nr: Clock the SPI controller is to use to generate SPI clocks.
59  * @num_cs: Number of elements in the 'cs' array.
60  *
61  * Call this from machine init code for each SPI Controller that
62  * has some chips attached to it.
63  */
64 extern void rockchip_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
65 						int num_cs);
66 extern void rockchip_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
67 						int num_cs);
68 extern void rockchip_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
69 						int num_cs);
70 
71 /* defined by architecture to configure gpio */
72 extern int rockchip_spi0_cfg_gpio(void);
73 extern int rockchip_spi1_cfg_gpio(void);
74 extern int rockchip_spi2_cfg_gpio(void);
75 
76 extern struct rockchip_spi_info rockchip_spi0_pdata;
77 extern struct rockchip_spi_info rockchip_spi1_pdata;
78 extern struct rockchip_spi_info rockchip_spi2_pdata;
79 #endif /* __ROCKCHIP_PLAT_SPI_H */
80