1 /* 2 * Copyright (c) 2026, Arm Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <arch.h> 8 #include <arch_features.h> 9 #include <arch_helpers.h> 10 #include <lib/extensions/debug_v8p9.h> 11 debugv8p9_extended_bp_wp_enable(cpu_context_t * ctx)12void debugv8p9_extended_bp_wp_enable(cpu_context_t *ctx) 13 { 14 el3_state_t *state = get_el3state_ctx(ctx); 15 u_register_t mdcr_el3_val; 16 17 mdcr_el3_val = read_ctx_reg(state, CTX_MDCR_EL3); 18 /* When FEAT_Debugv8p9 is implemented: 19 * 20 * MDCR_EL3.EBWE: Set to 0b1 21 * Enables use of additional breakpoints or watchpoints, 22 * and disables trap to EL3 on accesses to debug register. 23 * 24 * EBWE bit is RES0 when we have less than 16 breakpoints/watchpoints. 25 * However register access for mode selection from Lower EL's should not 26 * trap to EL3 when we have more than 16 breakpoints/watchpoints. 27 * When we have less than 16 breakpoints/watchpoints, the mode select 28 * register is RAZ/WI. 29 */ 30 mdcr_el3_val |= MDCR_EBWE_BIT; 31 write_ctx_reg(state, CTX_MDCR_EL3, mdcr_el3_val); 32 } 33