1/* 2 * Copyright (c) 2025, Arm Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7#include <arch.h> 8#include <asm_macros.S> 9#include <common/bl_common.h> 10#include <venom.h> 11#include <cpu_macros.S> 12#include <plat_macros.S> 13 14/* Hardware handled coherency */ 15#if HW_ASSISTED_COHERENCY == 0 16#error "Venom must be compiled with HW_ASSISTED_COHERENCY enabled" 17#endif 18 19/* 64-bit only core */ 20#if CTX_INCLUDE_AARCH32_REGS == 1 21#error "Venom supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0" 22#endif 23 24cpu_reset_prologue venom 25 26cpu_reset_func_start venom 27 /* ---------------------------------------------------- 28 * Disable speculative loads 29 * ---------------------------------------------------- 30 */ 31 msr SSBS, xzr 32 enable_mpmm 33cpu_reset_func_end venom 34 35func venom_core_pwr_dwn 36 /* --------------------------------------------------- 37 * Flip CPU power down bit in power control register. 38 * It will be set on powerdown and cleared on wakeup 39 * --------------------------------------------------- 40 */ 41 sysreg_bit_toggle VENOM_IMP_CPUPWRCTLR_EL1, \ 42 VENOM_IMP_CPUPWRCTLR_EL1_CORE_PWRDN_EN_BIT 43 isb 44 signal_pabandon_handled 45 ret 46endfunc venom_core_pwr_dwn 47 48.section .rodata.venom_regs, "aS" 49venom_regs: /* The ASCII list of register names to be reported */ 50 .asciz "cpuectlr_el1", "" 51 52func venom_cpu_reg_dump 53 adr x6, venom_regs 54 mrs x8, VENOM_IMP_CPUECTLR_EL1 55 ret 56endfunc venom_cpu_reg_dump 57 58declare_cpu_ops venom, VENOM_MIDR, \ 59 venom_reset_func, \ 60 venom_core_pwr_dwn 61